IEEE Transactions on Computers

Papers
(The H4-Index of IEEE Transactions on Computers is 34. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-06-01 to 2025-06-01.)
ArticleCitations
Extending Performance-Energy Trade-offs Via Dynamic Core Scaling129
Analytical Model for Memory-Centric High Level Synthesis-Generated Applications123
SSD In-Storage Computing for Search Engines110
A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems103
An Edge-Side Real-Time Video Analytics System With Dual Computing Resource Control96
WaWoT: Towards Flexible and Efficient Web of Things Services via WebAssembly on Resource-Constrained IoT Devices96
A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph Processing93
Online Scheduling of Distributed Machine Learning Jobs for Incentivizing Sharing in Multi-Tenant Systems90
Energy-Delay-Aware Joint Microservice Deployment and Request Routing With DVFS in Edge: A Reinforcement Learning Approach88
ParBFT: An Optimized Byzantine Consensus Parallelism Scheme87
Adaptive Page Migration Policy With Huge Pages in Tiered Memory Systems78
Redactable Blockchain From Decentralized Chameleon Hash Functions, Revisited67
Meta-Block: Exploiting Cross-Layer and Direct Storage Access for Decentralized Blockchain Storage Systems65
RSQC: Recursive Sparse QUBO Construction for Quantum Annealing Machines65
MMDataLoader: Reusing Preprocessed Data Among Concurrent Model Training Tasks62
Analysis & Design of Convolution Operator for High Speed and High Accuracy Convolutional Neural Network-Based Inference Engines62
EIHDP: Edge-Intelligent Hierarchical Dynamic Pricing Based on Cloud-Edge-Client Collaboration for IoT Systems60
How to Launch a Powerful Side-Channel Collision Attack?58
Efficient CP-ABE Scheme With Shared Decryption in Cloud Storage58
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs53
ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators52
Improving Interference Analysis for Real-Time DAG Tasks Under Partitioned Scheduling48
An Area-Efficient In-Memory Implementation Method of Arbitrary Boolean Function Based on SRAM Array48
Hardware Private Circuits: From Trivial Composition to Full Verification47
Spin-Variable Reduction Method for Handling Linear Equality Constraints in Ising Machines46
Raptor-T: A Fused and Memory-Efficient Sparse Transformer for Long and Variable-Length Sequences45
RTSA: A Run-Through Sparse Attention Framework for Video Transformer44
LUNA-CiM: A Programmable Compute-in-Memory Fabric for Neural Network Acceleration42
Karatsuba Matrix Multiplication and Its Efficient Custom Hardware Implementations41
A Low-Cost Burn-In Tester Architecture to Supply Effective Electrical Stress40
Unsupervised Spiking Instance Segmentation on Event Data Using STDP Features40
A Provably Secure Strong PUF Based on LWE: Construction and Implementation39
PCB Hardware Trojan Run-Time Detection Through Machine Learning35
Effective Huge Page Strategies for TLB Miss Reduction in Nested Virtualization35
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