IEEE Transactions on Computers

Papers
(The median citation count of IEEE Transactions on Computers is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-04-01 to 2025-04-01.)
ArticleCitations
DSTC: Dual-Side Sparse Tensor Core for DNNs Acceleration on Modern GPU Architectures236
NetMod: Toward Accelerating Cloud RAN Distributed Unit Modulation Within Programmable Switches118
Mix-GEMM: Extending RISC-V CPUs for Energy-Efficient Mixed-Precision DNN Inference Using Binary Segmentation118
Redactable Blockchain From Decentralized Chameleon Hash Functions, Revisited102
Protecting the CCSDS 123.0-B-2 Compression Algorithm Against Single-Event Upsets for Space Applications100
Exploring Hyperdimensional Computing Robustness Against Hardware Errors91
A Machine Learning-Empowered Cache Management Scheme for High-Performance SSDs86
Secure Deep Learning in Defense in Deep-Learning-as-a-Service Computing Systems in Digital Twins82
Affinity-Aware VNF Placement in Mobile Edge Clouds via Leveraging GPUs80
The Butterfly Effect in Primary Visual Cortex80
Energy-Delay-Aware Joint Microservice Deployment and Request Routing with DVFS in Edge: A Reinforcement Learning Approach79
A Complexity-Effective Local Delta Prefetcher76
Guest Editorial: IEEE Transactions on Computer, Special Issue on Hardware Security73
Brain-Inspired Computing for Circuit Reliability Characterization63
Blockchain-Based Distributed Multiagent Reinforcement Learning for Collaborative Multiobject Tracking Framework62
Deep Learning Operators Performance Tuning for Changeable Sized Input Data on Tensor Accelerate Hardware60
Online Scheduling of Distributed Machine Learning Jobs for Incentivizing Sharing in Multi-Tenant Systems57
A Systematic View of Model Leakage Risks in Deep Neural Network Systems57
nDirect2: A High-Performance Library for Direct Convolutions on Multi-Core CPUs54
ReViT: Vision Transformer Accelerator With Reconfigurable Semantic-Aware Differential Attention54
Dynamic Graph Publication with Differential Privacy Guarantees for Decentralized Applications52
Distributed Sketch Deployment for Software Switches48
WaWoT: Towards Flexible and Efficient Web of Things Services via WebAssembly on Resource-Constrained IoT Devices48
A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph Processing47
Hierarchical Hashing: A Dynamic Hashing Method With Low Write Amplification and High Performance for Non-Volatile Memory46
A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems45
Reliability Enhanced Heterogeneous Phase Change Memory Architecture for Performance and Energy Efficiency45
Reaping Both Latency and Reliability Benefits With Elaborate Sanitization Design for 3D TLC NAND Flash45
Scenario-based AI Benchmark Evaluation of Distributed Cloud/Edge Computing Systems42
Amnesiac DRAM: A Proactive Defense Mechanism Against Cold Boot Attacks40
A Lightweight and Chip-Level Reconfigurable Architecture for Next-Generation IoT End Devices39
Wrong-Path-Aware Entangling Instruction Prefetcher39
On Key–Value Sort With Active Compute Memory38
Distributed Learning for Large-Scale Models at Edge With Privacy Protection38
HiBid: A Cross-Channel Constrained Bidding System With Budget Allocation by Hierarchical Offline Deep Reinforcement Learning36
Breaking the DECT Standard Cipher With Lower Time Cost36
BFT-DSN: A Byzantine Fault-Tolerant Decentralized Storage Network36
UniSched: A Unified Scheduler for Deep Learning Training Jobs With Different User Demands32
CoDA: A Co-Design Framework for Versatile and Efficient Attention Accelerators29
Improved Fault Analysis on Subterranean 2.029
Multi-Grained Trace Collection, Analysis, and Management of Diverse Container Images29
ROLoad-PMP: Securing Sensitive Operations for Kernels and Bare-Metal Firmware28
CAPE: Criticality-Aware Performance and Energy Optimization Policy for NCFET-Based Caches28
Compressed Test Pattern Generation for Deep Neural Networks27
Detecting the Capacitance-Based Gamepad for Protecting Mobile Game Fairness27
ClusPar: A Game-Theoretic Approach for Efficient and Scalable Streaming Edge Partitioning26
TOP: Towards Open & Predictable Heterogeneous SoCs26
Deep Learning Acceleration Optimization of Stress Boundary Value Problem Solvers25
High-Performance Tensor-Train Primitives Using GPU Tensor Cores25
Extending Performance-Energy Trade-offs Via Dynamic Core Scaling24
Exploiting Structured Feature and Runtime Isolation for High-Performant Recommendation Serving24
Opara: Exploiting Operator Parallelism for Expediting DNN Inference on GPUs24
Balancing Privacy and Accuracy Using Significant Gradient Protection in Federated Learning24
Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems24
Dependability of the K Minimum Values Sketch: Protection and Comparative Analysis24
A Deep Learning-Assisted Template Attack Against Dynamic Frequency Scaling Countermeasures23
Supersingular Isogeny Key Encapsulation (SIKE) Round 2 on ARM Cortex-M423
Deep Learning for HDD Health Assessment: An Application Based on LSTM23
Polymorphic Accelerators for Deep Neural Networks23
Online Machine Learning for Energy-Aware Multicore Real-Time Embedded Systems22
A Framework for Crossing Temperature-Induced Timing Errors Underlying Hardware Accelerators to the Algorithm and Application Layers22
Optimizing Vertex Pressure Dynamic Graph Partitioning in Many-Core Systems22
Nonlinear Code-Based Low-Overhead Fine-Grained Control Flow Checking21
Towards Hard Real-Time and Energy-Efficient Virtualization for Many-Core Embedded Systems21
ADC-Free ReRAM-Based In-Situ Accelerator for Energy-Efficient Binary Neural Networks21
Analysis & Design of Convolution Operator for High Speed and High Accuracy Convolutional Neural Network-Based Inference Engines21
OSC: An Online Self-Configuring Big Data Framework for Optimization of QoS21
Meta-Block: Exploiting Cross-Layer and Direct Storage Access for Decentralized Blockchain Storage Systems21
Computing En-Route for Near-Data Processing21
Preventing Coherence State Side Channel Leaks Using TimeCache21
Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems20
HIPEDAP: Energy-Efficient Hardware Accelerators for Hidden Periodicity Detection20
MDTUpdate: A Multi-Block Double Tree Update Technique in Heterogeneous Erasure-Coded Clusters20
Parallel Path Progression DAG Scheduling20
Hitchhiker: Accelerating ORAM With Dynamic Scheduling20
HAOTuner: A Hardware Adaptive Operator Auto-Tuner for Dynamic Shape Tensor Compilers20
How to Launch a Powerful Side-Channel Collision Attack?20
An Energy Efficient and Runtime Reconfigurable Accelerator for Robotic Localization20
Enabling Efficient Spatio-Temporal GPU Sharing for Network Function Virtualization20
ParBFT: An Optimized Byzantine Consensus Parallelism Scheme20
Toward an SGX-Friendly Java Runtime19
Towards Optimal Application Offloading in Heterogeneous Edge-Cloud Computing19
FedGKD: Toward Heterogeneous Federated Learning via Global Knowledge Distillation19
Accelerating Finite-Field and Torus Fully Homomorphic Encryption via Compute-Enabled (S)RAM19
aChain: A SQL-Empowered Analytical Blockchain as a Database19
A User Mobility-Based Data Placement Strategy in a Hybrid Cloud/Edge Environment Using a Causal-Aware Deep Learning Network19
FileDAG: A Multi-Version Decentralized Storage Network Built on DAG-Based Blockchain19
ASHL: An Adaptive Multi-Stage Distributed Deep Learning Training Scheme for Heterogeneous Environments19
CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures18
Lightweight, Effective Detection and Characterization of Mobile Malware Families18
Hybrid Edge-Cloud Collaborator Resource Scheduling Approach Based on Deep Reinforcement Learning and Multiobjective Optimization18
k-Level Truthful Incentivizing Mechanism and Generalized k-MAB Problem18
MMDataLoader: Reusing Preprocessed Data Among Concurrent Model Training Tasks18
Trading Aggregate Statistics Over Private Internet of Things Data18
Analytical Model for Memory-Centric High Level Synthesis-Generated Applications18
Adaptively Reduced DRAM Caching for Energy-Efficient High Bandwidth Memory17
MarCNNet: A Markovian Convolutional Neural Network for Malware Detection and Monitoring Multi-Core Systems17
Stop and Look: A Novel Checkpointing and Debugging Flow for FPGAs17
StreamDFP: A General Stream Mining Framework for Adaptive Disk Failure Prediction17
An In-Module Disturbance Barrier for Mitigating Write Disturbance in Phase-Change Memory16
Optimizing Inter-Core Communications Under the LET Paradigm using DMA Engines16
PackCache: An Online Cost-Driven Data Caching Algorithm in the Cloud16
RUPA: A High Performance, Energy Efficient Accelerator for Rule-Based Password Generation in Heterogenous Password Recovery System16
Toward Comprehensive Shifting Fault Tolerance for Domain-Wall Memories With PIETT16
Telepathy: A Lightweight Silent Data Access Protocol for NVRAM+RDMA Enabled Distributed Storage16
SAFLA: Scheduling Multiple Real-Time Periodic Task Graphs on Heterogeneous Systems16
SurgeNAS: A Comprehensive Surgery on Hardware-Aware Differentiable Neural Architecture Search16
Attacking the Privacy of Approximate Membership Check Filters by Positive Concentration15
On the Effects of Transaction Data Access Patterns on Performance in Lock-Based Concurrency Control15
ADLPT: Improving 3D NAND Flash Memory Reliability by Adaptive Lifetime Prediction Techniques15
Design Space Exploration for Efficient Quantum Most-Significant Digit-First Arithmetic15
MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative Execution15
CAMDNN: Content-Aware Mapping of a Network of Deep Neural Networks on Edge MPSoCs15
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs14
On the Reliability of FeFET On-Chip Memory14
Multi-Bank On-Chip Memory Management Techniques for CNN Accelerators14
Guest Editorial: IEEE TC Special Issue On Communications for Many-core Processors and Accelerators14
A Comprehensive Methodology to Optimize FPGA Designs via the Roofline Model14
S-SMART++: A Low-Latency NoC Leveraging Speculative Bypass Requests14
An End-to-End Learning-Based Metadata Management Approach for Distributed File Systems14
High Fidelity Simulation of Hybrid Systems using Higher Order Hybrid Automata14
Fully Learnable Hyperdimensional Computing Framework With Ultratiny Accelerator for Edge-Side Applications14
SSD In-Storage Computing for Search Engines14
Rad-Hard Designs by Automated Latching-Delay Assignment and Time-Borrowable D-Flip-Flop14
EIHDP: Edge-Intelligent Hierarchical Dynamic Pricing Based on Cloud-Edge-Client Collaboration for IoT Systems14
FLiMS: a Fast Lightweight 2-way Merger for Sorting14
Efficient CP-ABE Scheme With Shared Decryption in Cloud Storage13
An Edge-Side Real-Time Video Analytics System With Dual Computing Resource Control13
SAFA: A Semi-Asynchronous Protocol for Fast Federated Learning With Low Overhead13
Spatio-Temporal Optimization of Deep Neural Networks for Reconfigurable FPGA SoCs13
A Hybrid Quantum-Classical Approach to Mitigating Measurement Errors in Quantum Algorithms13
A Dynamic Adaptive Framework for Practical Byzantine Fault Tolerance Consensus Protocol in the Internet of Things13
Efficient Processing of Sparse Tensor Decomposition via Unified Abstraction and PE-Interactive Architecture13
Denial-of-Service Vulnerability of Hash-based Transaction Sharding: Attack and Countermeasure13
Design and Simulation of a Hybrid Architecture for Edge Computing in 5G and Beyond13
Disjoint Paths Construction and Fault-Tolerant Routing in BCube of Data Center Networks13
Adaptive Power Shifting for Power-Constrained Heterogeneous Systems12
Design of a Universal Decoder Model Based on DNA Winner-Takes-All Neural Networks12
Adaptive Page Migration Policy With Huge Pages in Tiered Memory Systems12
ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators12
Vector-Indistinguishability: Location Dependency Based Privacy Protection for Successive Location Data12
MANA: Microarchitecting a Temporal Instruction Prefetcher12
Exact and Approximate Squarers for Error-Tolerant Applications12
ISPA: Exploiting Intra-SM Parallelism in GPUs via Fine-Grained Resource Management12
An Occlusion and Noise-Aware Stereo Framework Based on Light Field Imaging for Robust Disparity Estimation12
An Adversarial Robust Behavior Sequence Anomaly Detection Approach Based on Critical Behavior Unit Learning12
Hardware Accelerated Vision Transformer via Heterogeneous Architecture Design and Adaptive Dataflow Mapping12
Design and Analysis of RSA and Paillier Homomorphic Cryptosystems Using PSO-Based Evolutionary Computation12
Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors12
Predictive Execution of Parallel Simulations in Hard Real-Time Systems11
Data Sharing in the Metaverse With Key Abuse Resistance Based on Decentralized CP-ABE11
Improving Interference Analysis for Real-Time DAG Tasks Under Partitioned Scheduling11
DeepP: Deep Learning Multi-Program Prefetch Configuration for the IBM POWER 811
An Iterative Montgomery Modular Multiplication Algorithm With Low Area-Time Product11
Feynman Meets Turing: The Uncomputability of Quantum Gate-Circuit Emulation and Concatenation11
RTSA: A Run-Through Sparse Attention Framework for Video Transformer11
Time-Memory Trade-Offs for Saber+ on Memory-Constrained RISC-V Platform11
Convolutional Neural Networks with Discrete Cosine Transform Features11
A Self-Refreshable Bit-Cell for Single-Cycle Refreshing of Embedded Memories11
2021 Index IEEE Transactions on Computers Vol. 7011
High-Radix Generalized Hyperbolic CORDIC and Its Hardware Implementation11
PFed-NS: an Adaptive Personalized Federated Learning Scheme through Neural Network Segmentation11
Accelerating Address Translation for Virtualization by Leveraging Hardware Mode11
Exploring Truss Maintenance in Fully Dynamic Graphs: A Mixed Structure-Based Approach11
STT-MRAM-Based Reliable Weak PUF11
Serving Multi-DNN Workloads on FPGAs: A Coordinated Architecture, Scheduling, and Mapping Perspective10
Operand-Oriented Virtual Memory Support for Near-Memory Processing10
Blockchain-Based Fair and Fine-Grained Data Trading With Privacy Preservation10
Tolerance of Siamese Networks (SNs) to Memory Errors: Analysis and Design10
EGCN: An Efficient GCN Accelerator for Minimizing Off-Chip Memory Access10
A Provably Secure Strong PUF Based on LWE: Construction and Implementation10
$\mathit {O(N)}$ Memory-Free Hardware Architecture for Burrows-Wheeler Transform10
Tissue P Systems With States in Cells10
A Resource Efficient Software-Hardware Co-Design of Lattice-Based Homomorphic Encryption Scheme on the FPGA10
Monarch: A Durable Polymorphic Memory for Data Intensive Applications10
Exploring Model Stability of Deep Neural Networks for Reliable RRAM-Based In-Memory Acceleration10
PCB Hardware Trojan Run-Time Detection Through Machine Learning10
Spin-Variable Reduction Method for Handling Linear Equality Constraints in Ising Machines10
Transition Factors of Power Consumption Models for CPA Attacks on Cryptographic RISC-V SoC10
GRIP: A Graph Neural Network Accelerator Architecture10
Unsupervised Spiking Instance Segmentation on Event Data Using STDP Features10
DISCO: Time-Compositional Cache Coherence for Multi-Core Real-Time Embedded Systems10
A Low-Cost Burn-In Tester Architecture to Supply Effective Electrical Stress10
VSPIM: SRAM Processing-in-Memory DNN Acceleration via Vector-Scalar Operations9
Mitigating Adversarial Attacks Based on Denoising & Reconstruction With Finance Authentication System Case Study9
GreedW: A Flexible and Efficient Decentralized Framework for Distributed Machine Learning9
SafeDRL: Dynamic Microservice Provisioning With Reliability and Latency Guarantees in Edge Environments9
Enabling HW-Based Task Scheduling in Large Multicore Architectures9
Improving Cluster Utilization Through Adaptive Resource Management for Deep Neural Network and CPU Jobs Colocation9
Saca-AVF: A Quantitative Approach to Analyze the Architectural Vulnerability Factors of CNN Accelerators9
Detecting Outlier Machine Instances Through Gaussian Mixture Variational Autoencoder With One Dimensional CNN9
Lightweight Blockchain-Empowered Secure and Efficient Federated Edge Learning9
Honeycomb: Ordered Key-Value Store Acceleration on an FPGA-Based SmartNIC9
Adaptive SAT Modeling for Optimal Pattern Retargeting in IEEE 1687 Networks9
A Reliability-Critical Path Identifying Method With Local and Global Adjacency Probability Matrix in Combinational Circuits9
Zero-Jitter Chains of Periodic LET Tasks via Algebraic Rings9
A High-Coverage and Efficient Instruction-Level Testing Approach for x86 Processors9
Optimizing DNNs With Partially Equivalent Transformations and Automated Corrections9
DeepFire2: A Convolutional Spiking Neural Network Accelerator on FPGAs9
An Area-Efficient In-Memory Implementation Method of Arbitrary Boolean Function Based on SRAM Array9
DBMS-Assisted Live Migration of Virtual Machines9
User-Distribution-Aware Federated Learning for Efficient Communication and Fast Inference9
Hardware Design of an Advanced-Feature Cryptographic Tile Within the European Processor Initiative9
Limon: A Scalable and Stable Key-Value Engine for Fast NVMe Devices9
Raptor-T: A Fused and Memory-Efficient Sparse Transformer for Long and Variable-Length Sequences8
I/O Causality Based In-Line Data Deduplication for Non-Volatile Memory Enabled Storage Systems8
vKernel: Enhancing Container Isolation via Private Code and Data8
LAC: A Workload Intensity-Aware Caching Scheme for High-Performance SSDs8
Effective Huge Page Strategies for TLB Miss Reduction in Nested Virtualization8
Enabling Reliable Memory-Mapped I/O With Auto-Snapshot for Persistent Memory Systems8
Online Container Scheduling With Fast Function Startup and Low Memory Cost in Edge Computing8
Hardware Implementation of Unsigned Approximate Hybrid Square Rooters for Error-Resilient Applications8
GFBE: A Generalized and Fine-Grained Blockchain Evaluation Framework8
NDRec: A Near-Data Processing System for Training Large-Scale Recommendation Models8
Analysis and Mitigation of Shared Resource Contention on Heterogeneous Multicore: An Industrial Case Study8
TurboDL: Improving the CNN Training on GPU With Fine-Grained Multi-Streaming Scheduling8
Incendio: Priority-Based Scheduling for Alleviating Cold Start in Serverless Computing8
MUSE: A Multi-Tierd and SLA-Driven Deduplication Framework for Cloud Storage Systems8
Statistical Higher-Order Correlation Attacks Against Code-Based Masking8
Generating Neural Networks for Diverse Networking Classification Tasks via Hardware-Aware Neural Architecture Search8
Decentralized Task Offloading in Edge Computing: An Offline-to-Online Reinforcement Learning Approach8
Error-Detection Schemes for Analog Content-Addressable Memories8
FutureDID: A Fully Decentralized Identity System With Multi-Party Verification8
CBANA: A Lightweight, Efficient, and Flexible Cache Behavior Analysis Framework8
VISE: Combining Intel SGX and Homomorphic Encryption for Cloud Industrial Control Systems8
Novas: Tackling Online Dynamic Video Analytics With Service Adaptation at Mobile Edge Servers8
Leveraging GPU in Homomorphic Encryption: Framework Design and Analysis of BFV Variants7
Scheduling of Real-Time Tasks With Multiple Critical Sections in Multiprocessor Systems7
Revealing DRAM Operating GuardBands Through Workload-Aware Error Predictive Modeling7
Selective Neuron Re-Computation (SNRC) for Error-Tolerant Neural Networks7
Acceleration of Fast Sample Entropy for FPGAs7
Online Service Function Chain Placement for Cost-Effectiveness and Network Congestion Control7
AsyncGBP+: Bridging SSL/TLS and Heterogeneous Computing Power With GPU-Based Providers7
Improving Efficiency in Multi-Modal Autonomous Embedded Systems Through Adaptive Gating7
Efficient and Secure Storage Verification in Cloud-Assisted Industrial IoT Networks7
Performance and Environment-Aware Advanced Driving Assistance Systems7
Optimized Quantum Circuit of AES With Interlacing-Uncompute Structure7
Improving the Performance of Block-based DRAM Caches Via Tag-Data Decoupling7
Guest Editorial: IEEE TC Special Issue On Smart Edge Computing and IoT7
Lock-Free Triangle Counting on GPU7
Optimizing the Deployment of Tiny Transformers on Low-Power MCUs7
Distributed Differentially Private Matrix Factorization for Implicit Data via Secure Aggregation7
Mitigation of Phase Transitions in Self-Organizing NoC for Stable Queueing Dynamics7
MDev-NVMe: Mediated Pass-Through NVMe Virtualization Solution With Adaptive Polling7
Probabilistic Value-Deviation-Bounded Source-Dependent Bit-Level Channel Adaptation for Approximate Communication7
A Parallel Tag Cache for Hardware Managed Tagged Memory in Multicore Processors7
An Efficient CRT-Based Bit-Parallel Multiplier for Special Pentanomials7
ETBench: Characterizing Hybrid Vision Transformer Workloads across Edge Devices7
Slack Time Management for Imprecise Mixed-Criticality Systems with Reliability Constraints7
An Efficient Methodology for Binary Logarithmic Computations of Floating-Point Numbers with Normalized Output within One ulp of Accuracy7
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