IEEE Transactions on Computers

Papers
(The TQCC of IEEE Transactions on Computers is 7. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-05-01 to 2024-05-01.)
ArticleCitations
SAFA: A Semi-Asynchronous Protocol for Fast Federated Learning With Low Overhead151
A Deep Reinforcement Learning Based Offloading Game in Edge Computing134
EIHDP: Edge-Intelligent Hierarchical Dynamic Pricing Based on Cloud-Edge-Client Collaboration for IoT Systems95
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks75
Information Assurance Through Redundant Design: A Novel TNU Error-Resilient Latch for Harsh Radiation Environment68
BAFL: A Blockchain-Based Asynchronous Federated Learning Framework65
Dependent Task Offloading for Edge Computing based on Deep Reinforcement Learning64
ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators61
Efficient CP-ABE Scheme With Shared Decryption in Cloud Storage61
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs57
Deep Learning for HDD Health Assessment: An Application Based on LSTM56
Voltage Over-Scaling-Based Lightweight Authentication for IoT Security56
Algorithmics of Cost-Driven Computation Offloading in the Edge-Cloud Environment55
An Improved Logarithmic Multiplier for Energy-Efficient Neural Computing55
PANTHER: A Programmable Architecture for Neural Network Training Harnessing Energy-Efficient ReRAM54
MTHAEL: Cross-Architecture IoT Malware Detection Based on Neural Network Advanced Ensemble Learning53
Credit Risk Analysis Using Quantum Computers51
A3C-DO: A Regional Resource Scheduling Framework Based on Deep Reinforcement Learning in Edge Scenario49
The Graph Structure of the Generalized Discrete Arnold's Cat Map46
Lime: Low-Cost and Incremental Learning for Dynamic Heterogeneous Information Networks46
Adaptive Federated Learning on Non-IID Data With Resource Constraint45
BLADE: An in-Cache Computing Architecture for Edge Devices42
A Blockchain-Based Decentralized, Fair and Authenticated Information Sharing Scheme in Zero Trust Internet-of-Things40
Optimality Study of Existing Quantum Computing Layout Synthesis Tools39
Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures38
Accelerating Deep Neural Network In-Situ Training With Non-Volatile and Volatile Memory Based Hybrid Precision Synapses37
Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators36
Vector-Indistinguishability: Location Dependency Based Privacy Protection for Successive Location Data36
Hardware Private Circuits: From Trivial Composition to Full Verification35
An Energy-Aware High Performance Task Allocation Strategy in Heterogeneous Fog Computing Environments34
Elliptic Curve Cryptography Point Multiplication Core for Hardware Security Module33
Evaluations on Deep Neural Networks Training Using Posit Number System31
An Extensive Study of Flexible Design Methods for the Number Theoretic Transform31
PyQUBO: Python Library for Mapping Combinatorial Optimization Problems to QUBO Form30
Magnifying Side-Channel Leakage of Lattice-Based Cryptosystems With Chosen Ciphertexts: The Case Study of Kyber30
Malware Analysis By Combining Multiple Detectors and Observation Windows30
SCAUL: Power Side-Channel Analysis With Unsupervised Learning29
Real-Time Detection of Hogweed: UAV Platform Empowered by Deep Learning28
Design and Simulation of a Hybrid Architecture for Edge Computing in 5G and Beyond28
Supersingular Isogeny Key Encapsulation (SIKE) Round 2 on ARM Cortex-M427
Endogenous Trusted DRL-Based Service Function Chain Orchestration for IoT27
A Hybrid Quantum-Classical Approach to Mitigating Measurement Errors in Quantum Algorithms27
VecQ: Minimal Loss DNN Model Compression With Vectorized Weight Quantization26
Fairness-Aware Energy Efficient Scheduling on Heterogeneous Multi-Core Processors26
Accelerating Hyperdimensional Computing on FPGAs by Exploiting Computational Reuse26
Learning-Based Modeling and Optimization for Real-Time System Availability26
Distributed Deep Convolutional Neural Networks for the Internet-of-Things26
λDNN: Achieving Predictable Distributed DNN Training With Serverless Architectures26
High-Speed Hardware Architectures and FPGA Benchmarking of CRYSTALS-Kyber, NTRU, and Saber26
LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference25
Practical and Secure SVM Classification for Cloud-Based Remote Clinical Decision Services24
Automated Performance Modeling of HPC Applications Using Machine Learning24
Evaluation and Optimization of Distributed Machine Learning Techniques for Internet of Things24
Lightweight Ciphers and Their Side-Channel Resilience23
Falcon: Addressing Stragglers in Heterogeneous Parameter Server Via Multiple Parallelism23
In-Storage Computing for Hadoop MapReduce Framework: Challenges and Possibilities23
Practical Resilience Analysis of GPGPU Applications in the Presence of Single- and Multi-Bit Faults23
Circuit-Based Quantum Random Access Memory for Classical Data With Continuous Amplitudes23
SPDL: A Blockchain-Enabled Secure and Privacy-Preserving Decentralized Learning System22
Snitch: A Tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads21
Plasticity-on-Chip Design: Exploiting Self-Similarity for Data Communications20
Efficient Software Implementation of Ring-LWE Encryption on IoT Processors20
Soft Error Effects on Arm Microprocessors: Early Estimations versus Chip Measurements20
Detecting Outlier Machine Instances Through Gaussian Mixture Variational Autoencoder With One Dimensional CNN20
VISE: Combining Intel SGX and Homomorphic Encryption for Cloud Industrial Control Systems19
2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets19
On the Reliability of FeFET On-Chip Memory19
Laser-Induced Fault Injection on Smartphone Bypassing the Secure Boot-Extended Version19
SSD In-Storage Computing for Search Engines19
FeFET Multi-Bit Content-Addressable Memories for In-Memory Nearest Neighbor Search18
Revocable Blockchain-Aided Attribute-Based Encryption With Escrow-Free in Cloud Storage18
An Adaptive Thermal Management Framework for Heterogeneous Multi-Core Processors18
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores17
A RISC-V ISA Extension for Ultra-Low Power IoT Wireless Signal Processing17
MGARD+: Optimizing Multilevel Methods for Error-Bounded Scientific Data Reduction17
Qubit Mapping Based on Subgraph Isomorphism and Filtered Depth-Limited Search17
Blockchain-Cloud Transparent Data Marketing: Consortium Management and Fairness17
Folding BIKE: Scalable Hardware Implementation for Reconfigurable Devices16
Elastic Bloom Filter: Deletable and Expandable Filter Using Elastic Fingerprints16
Brain-Inspired Computing for Circuit Reliability Characterization16
A Fast Filtering Mechanism to Improve Efficiency of Large-Scale Video Analytics16
A Neural Network Based Fault Management Scheme for Reliable Image Processing16
Scalable Concolic Testing of RTL Models16
Real-Time Task Scheduling for Machine Perception in In Intelligent Cyber-Physical Systems16
Inverse Queuing Model-Based Feedback Control for Elastic Container Provisioning of Web Systems in Kubernetes15
Object-Level Memory Allocation and Migration in Hybrid Memory Systems15
Shuhai: A Tool for Benchmarking High Bandwidth Memory on FPGAs15
PermCNN: Energy-Efficient Convolutional Neural Network Hardware Architecture With Permuted Diagonal Structure15
Joint Management of CPU and NVDIMM for Breaking Down the Great Memory Wall15
Enabling Secure NVM-Based in-Memory Neural Network Computing by Sparse Fast Gradient Encryption15
Flow-Based Microfluidic Biochips With Distributed Channel Storage: Synthesis, Physical Design, and Wash Optimization15
SLA-Based Scheduling of Spark Jobs in Hybrid Cloud Computing Environments15
DAG-Fluid: A Real-Time Scheduling Algorithm for DAGs14
DMRlib: Easy-Coding and Efficient Resource Management for Job Malleability14
Extending On-chain Trust to Off-chain -- Trustworthy Blockchain Data Collection using Trusted Execution Environment (TEE)14
Prune and Plant: Efficient Placement and Parallelism of Virtual Network Functions14
Real-Time Scheduling and Analysis of OpenMP DAG Tasks Supporting Nested Parallelism14
Improved Basic Block Reordering14
Hybrid Binary-Unary Hardware Accelerator14
Detecting Spectre Attacks Using Hardware Performance Counters14
A Comprehensive Methodology to Optimize FPGA Designs via the Roofline Model14
Malware-on-the-Brain: Illuminating Malware Byte Codes With Images for Malware Classification14
Toward QoS-Awareness and Improved Utilization of Spatial Multitasking GPUs14
Secure Lightweight Key Exchange Using ECC for User-Gateway Paradigm14
GRIP: A Graph Neural Network Accelerator Architecture14
Hardware-Assisted Malware Detection and Localization using Explainable Machine Learning13
Reliability Enhanced Heterogeneous Phase Change Memory Architecture for Performance and Energy Efficiency13
Enabling Homomorphically Encrypted Inference for Large DNN Models13
Software-Defined Design Space Exploration for an Efficient DNN Accelerator Architecture13
CloudChain: A Cloud Blockchain Using Shared Memory Consensus and RDMA13
E2CNNs: Ensembles of Convolutional Neural Networks to Improve Robustness Against Memory Errors in Edge-Computing Devices13
Ameliorate Performance of Memristor-Based ANNs in Edge Computing13
PAM: A Piecewise-Linearly-Approximated Floating-Point Multiplier With Unbiasedness and Configurability13
S2Engine: A Novel Systolic Architecture for Sparse Convolutional Neural Networks12
Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics12
L4L: Experience-Driven Computational Resource Control in Federated Learning12
How to Reduce the Bit-Width of an Ising Model by Adding Auxiliary Spins12
Hardware Design of an Advanced-Feature Cryptographic Tile within the European Processor Initiative12
Spatio-Temporal Optimization of Deep Neural Networks for Reconfigurable FPGA SoCs12
Spiking Generative Adversarial Networks With a Neural Network Discriminator: Local Training, Bayesian Models, and Continual Meta-Learning12
FeFET-Based Binarized Neural Networks Under Temperature-Dependent Bit Errors12
BM-RCGL: Benchmarking Approach for Localization of Reliability-Critical Gates in Combinational Logic Blocks12
An FPGA Based Accelerator for Clustering Algorithms With Custom Instructions12
Polynomial Computation Using Unipolar Stochastic Logic and Correlation Technique12
Remote Control: A Simple Deadlock Avoidance Scheme for Modular Systems-on-Chip12
An Efficient Preprocessing-Based Approach to Mitigate Advanced Adversarial Attacks12
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication12
PyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow12
Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing12
S-FLASH: A NAND Flash-based Deep Neural Network Accelerator Exploiting Bit-level Sparsity11
HW/SW Co-Design for Reliable TCAM- Based In-Memory Brain-Inspired Hyperdimensional Computing11
OmpSs@FPGA framework for high performance FPGA computing11
Tensor Recurrent Neural Network With Differential Privacy11
ECC-United Cache: Maximizing Efficiency of Error Detection/Correction Codes in Associative Cache Memories11
Small Constant Mean-Error Imprecise Adder/Multiplier for Efficient VLSI Implementation of MAC-Based Applications11
A First Look at RISC-V Virtualization from an Embedded Systems Perspective11
Schedulability Analysis of Global Scheduling for Multicore Systems With Shared Caches11
A Change-Detection-Based Thompson Sampling Framework for Non-Stationary Bandits11
STR: Secure Computation on Additive Shares Using the Share-Transform-Reveal Strategy11
Alternative Tower Field Construction for Quantum Implementation of the AES S-Box11
Reduced Precision DWC: An Efficient Hardening Strategy for Mixed-Precision Architectures11
Fast Encoding Algorithms for Reed–Solomon Codes With Between Four and Seven Parity Symbols11
Real-Time Full-Chip Thermal Tracking: A Post-Silicon, Machine Learning Perspective10
A Decentralized Mechanism Based on Differential Privacy for Privacy-Preserving Computation in Smart Grid10
Hierarchical Orchestration of Disaggregated Memory10
Accurate Cost Estimation of Memory Systems Utilizing Machine Learning and Solutions from Computer Vision for Design Automation10
Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems10
Efficient Pipelined Execution of CNNs Based on In-Memory Computing and Graph Homomorphism Verification10
Incentive Assignment in Hybrid Consensus Blockchain Systems in Pervasive Edge Environments10
AutoDiagn: An Automated Real-Time Diagnosis Framework for Big Data Systems10
Idler : I/O Workload Controlling for Better Responsiveness on Host-Aware Shingled Magnetic Recording Drives10
Generalized Mixed-Criticality Static Scheduling for Periodic Directed Acyclic Graphs on Multi-Core Processors10
Understanding Selective Delay as a Method for Efficient Secure Speculative Execution10
Truth Discovery With Multi-Modal Data in Social Sensing10
CryptSQLite: SQLite With High Data Security10
Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge9
GenoDedup: Similarity-Based Deduplication and Delta-Encoding for Genome Sequencing Data9
Improving Write Performance on Cross-Point RRAM Arrays by Leveraging Multidimensional Non-Uniformity of Cell Effective Voltage9
All-Digital Control-Theoretic Scheme to Optimize Energy Budget and Allocation in Multi-Cores9
Online Service Function Chain Placement for Cost-Effectiveness and Network Congestion Control9
On the Analysis of Parallel Real-Time Tasks With Spin Locks9
TrackLace: Data Management for Interlaced Magnetic Recording9
OpenHD: A GPU-Powered Framework for Hyperdimensional Computing9
AILC: Accelerate On-Chip Incremental Learning With Compute-in-Memory Technology9
Leaking Secrets through Modern Branch Predictor in the Speculative World9
STT-MRAM-Based Reliable Weak PUF9
Side-Channel Analysis and Countermeasure Design on ARM-Based Quantum-Resistant SIKE9
HePREM: A Predictable Execution Model for GPU-based Heterogeneous SoCs9
OPTIMUS: A Security-Centric Dynamic Hardware Partitioning Scheme for Processors that Prevent Microarchitecture State Attacks9
Constructing Completely Independent Spanning Trees in a Family of Line-Graph-Based Data Center Networks9
New Low-Area Designs for the AES Forward, Inverse and Combined S-Boxes9
Towards Thermal-Aware Workload Distribution in Cloud Data Centers Based on Failure Models9
MUSE: A Multi-Tierd and SLA-Driven Deduplication Framework for Cloud Storage Systems9
High-Performance FPGA Accelerator for SIKE9
Fast and Predictable Non-Volatile Data Memory for Real-Time Embedded Systems9
QoS Prediction and Adversarial Attack Protection for Distributed Services Under DLaaS9
VRBC: A Verifiable Redactable Blockchain with Efficient Query and Integrity Auditing8
Reinforcement Learning-Based Resource Partitioning for Improving Responsiveness in Cloud Gaming8
OPTWEB: A Lightweight Fully Connected Inter-FPGA Network for Efficient Collectives8
DVREI: Dynamic Verifiable Retrieval over Encrypted Images8
Blockchain-Based Distributed Multiagent Reinforcement Learning for Collaborative Multiobject Tracking Framework8
Online Machine Learning for Energy-Aware Multicore Real-Time Embedded Systems8
Fast Exact NPN Classification by Co-Designing Canonical Form and Its Computation Algorithm8
High-Radix Design of a Scalable Montgomery Modular Multiplier With Low Latency8
Efficient and scalable FPGA design of GF(2m) inversion for post-quantum cryptosystems8
A Modeling Framework for Reliability of Erasure Codes in SSD Arrays8
Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture8
SOT-MRAM Digital PIM Architecture With Extended Parallelism in Matrix Multiplication8
High-Performance Constant-Time Discrete Gaussian Sampling8
Leaking Information Through Cache LRU States in Commercial Processors and Secure Caches8
Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors8
Affinity-Aware VNF Placement in Mobile Edge Clouds via Leveraging GPUs8
3RSeT: Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison8
Tapping into NFV Environment for Opportunistic Serverless Edge Function Deployment8
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors8
DeepWare: Imaging Performance Counters with Deep Learning to Detect Ransomware8
Modeling Data Reuse in Deep Neural Networks by Taking Data-Types into Cognizance8
Fast and Accurate Error Simulation for CNNs Against Soft Errors8
Modularized Morphing of Deep Convolutional Neural Networks: A Graph Approach8
Page Reusability-Based Cache Partitioning for Multi-Core Systems8
Polymorphic Accelerators for Deep Neural Networks8
A Unified Cryptoprocessor for Lattice-Based Signature and Key-Exchange8
Hybrid Annealing Method Based on subQUBO Model Extraction With Multiple Solution Instances8
Adaptive Memory-Enhanced Time Delay Reservoir and its Memristive Implementation7
Thermal-Aware Design for Approximate DNN Accelerators7
STFL-DDR: Improving the Energy-Efficiency of Memory Interface7
PStream: A Popularity-Aware Differentiated Distributed Stream Processing System7
Analysis and Efficient Implementations of a Class of Composited de Bruijn Sequences7
Idempotence-Based Preemptive GPU Kernel Scheduling for Embedded Systems7
PRESTO: A Penalty-Aware Real-Time Scheduler for Task Graphs on Heterogeneous Platforms7
Stochastic SOT device based SNN architecture for On-chip Unsupervised STDP Learning7
Efficient Hardware Malware Detectors That are Resilient to Adversarial Evasion7
Scalability in Computing and Robotics7
Built-in Security Computer: Deploying Security-First Architecture Using Active Security Processor7
Stateful Serverless Application Placement in MEC With Function and State Dependencies7
Power-Efficient Heterogeneous Many-Core Design With NCFET Technology7
Revisiting Fault Adversary Models – Hardware Faults in Theory and Practice7
Exploiting Buffered Updates for Fast Streaming Graph Analysis7
Efficient Repair Analysis Algorithm Exploration for Memory With Redundancy and In-Memory ECC7
Control Performance Optimization for Application Integration on Automotive Architectures7
SAFLA: Scheduling Multiple Real-Time Periodic Task Graphs on Heterogeneous Systems7
PARMA: Parallelization-Aware Run-Time Management for Energy-Efficient Many-Core Systems7
Priority Assignment on Partitioned Multiprocessor Systems With Shared Resources7
Branch Prediction Attack on Blinded Scalar Multiplication7
Generating Robust DNN With Resistance to Bit-Flip Based Adversarial Weight Attack7
Fast En/Decoding of Reed-Solomon Codes for Failure Recovery7
Learned FBF: Learning-Based Functional Bloom Filter for Key-Value Storage7
Quantum Dimension Reduction for Pattern Recognition in High-Resolution Spatio-Spectral Data7
High-Accuracy Multiply-Accumulate (MAC) Technique for Unary Stochastic Computing7
Secure Deep Learning in Defense in Deep-Learning-as-a-Service Computing Systems in Digital Twins7
Scenario-based AI Benchmark Evaluation of Distributed Cloud/Edge Computing Systems7
Machine Learning Computers With Fractal von Neumann Architecture7
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