Microelectronics Journal

Article	Citations
Nanosheet field effect transistors-A next generation device to keep Moore's law alive: An intensive study	53
Characterization and optimization of junctionless gate-all-around vertically stacked nanowire FETs for sub-5 nm technology nodes	45
Comparing bulk-Si FinFET and gate-all-around FETs for the 5 ​nm technology node	38
Power optimized SRAM cell with high radiation hardened for aerospace applications	36
Design of photonic crystal based compact all-optical 2 × 1 multiplexer for optical processing devices	34
A review on emerging negative capacitance field effect transistor for low power electronics	34
DNA encoding for RGB image encryption with memristor based neuron model and chaos phenomenon	34
Simulation study on ferroelectric layer thickness dependence RF/Analog and linearity parameters in ferroelectric tunnel junction TFET	30
Si-based MEMS resonant sensor: A review from microfabrication perspective	28
Performance comparison of CNN, QNN and BNN deep neural networks for real-time object detection using ZYNQ FPGA node	26
Ultra-low-power and stable 10-nm FinFET 10T sub-threshold SRAM	26
Investigation of DC, RF and linearity performances of a back-gated (BG) heterojunction (HJ) TFET-on-selbox-substrate (STFET): Introduction to a BG-HJ-STEFT based CMOS inverter	25
RF & linearity distortion sensitivity analysis of DMG-DG-Ge pocket TFET with hetero dielectric	25
New electronically adjustable memelement emulator for realizing the behaviour of fully-floating meminductor and memristor	24
FinFET based SRAMs in Sub-10nm domain	24
Modeling the threshold voltage of core-and-outer gates of ultra-thin nanotube Junctionless-double gate-all-around (NJL-DGAA) MOSFETs	24
A biomorphic neuroprocessor based on a composite memristor-diode crossbar	23
Insights into the operation of negative capacitance FinFET for low power logic applications	22
A robust and write bit-line free sub-threshold 12T-SRAM for ultra low power applications in 14 nm FinFET technology	22
Performance analysis of optimized plasmonic half-adder circuit using Mach-Zehnder interferometer for high-speed switching applications	21
Performance analysis of silicon nanotube dielectric pocket Tunnel FET for reduced ambipolar conduction	21
Approximate radix-8 Booth multiplier for low power and high speed applications	21
A high-speed 4-bit Carry Look-Ahead architecture as a building block for wide word-length Carry-Select Adder	20
Negative drain-induced barrier lowering and negative differential resistance effects in negative-capacitance transistors	20
A novel ultra-low-power CNTFET and 45 nm CMOS based ternary SRAM	19

Top electrode dependent resistive switching in M/ZnO/ITO memristors, M = Al, ITO, Cu, and Au	19
Recent progress on negative capacitance tunnel FET for low-power applications: Device perspective	18
Thermal flow sensor used for thermal mass flowmeter	18
Spin field effect transistors and their applications: A survey	18
Device and circuit-level performance comparison of GAA nanosheet FET with varied geometrical parameters	17
A 0.4 ​V, body-driven, fully differential, tail-less OTA based on current push-pull	17
A review of III-V Tunnel Field Effect Transistors for future ultra low power digital/analog applications	17
Gaussian Mixture Model classifier analog integrated low-power implementation with applications in fault management detection	16
Design of threshold voltage insensitive pixel driver circuitry using a-IGZO TFT for AMOLED displays	16
Noise behavior of vertical tunnel FETs under the influence of interface trap states	16
Design of efficient approximate 1-bit Full Adder cells using CNFET technology applicable in motion detector systems	16
Numerical assessment of dielectrically-modulated short- double-gate PNPN TFET-based label-free biosensor	16
Ge/Si interfaced label free nanowire BIOFET for biomolecules detection - analytical analysis	16
Analytical modelling and sensitivity analysis of Gallium Nitride-Gate Material and, dielectric engineered- Schottky nano-wire fet(GaN-GME-DE-SNW-fet) based label-free biosensor	14
Accurate Dynamic Voltage and Frequency Scaling Measurement for Low-Power Microcontrollors in Wireless Sensor Networks	14
Integrated multi-band RF transceiver design for multi-standard applications using 130 ​nm CMOS technology	14
Disconnected N-doped zigzag ZnO nanoribbon for potential Negative Differential Resistance (NDR) applications	14
CNFET-based design of efficient ternary half adder and 1-trit multiplier circuits using dynamic logic	14
Design and implementation of 20-T hybrid full adder for high-performance arithmetic applications	14
Efficient ternary comparator on CMOS technology	13
An ultra-low-power neural signal acquisition analog front-end IC	13
MEMS piezoelectric micro power harvester physical parameter optimization, simulation, and fabrication for extremely low frequency and low vibration level applications	13
An intensive approach to optimize capacitive type RF MEMS shunt switch	13
0.7-V supply, 21-nW All–MOS voltage reference using a MOS-Only current-driven reference core in digital CMOS	13
Computing-in-memory using voltage-controlled spin-orbit torque based MRAM array	13
A low-power asynchronous hardware implementation of a novel SVM classifier, with an application in a speech recognition system	13
An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications	13
Improved optical performance in near visible light detection photosensor based on TFET	13
Performance Optimization of Analog Circuits in Negative Capacitance Transistor Technology	13
Efficient butterfly inspired optimization algorithm for analog circuits design	13
An efficient EEGNet processor design for portable EEG-Based BCIs	12
A novel low complexity and energy-efficient method to implement quaternary logic function in nanoelectronics	12
Voltage differencing buffered amplifier based low power, high frequency and universal filters using 32 nm CNTFET technology	12
Analytical model of subthreshold drain current for nanoscale negative capacitance junctionless FinFET	12
Enabling on-device classification of ECG with compressed learning for health IoT	12
Half-select disturb-free single-ended 9-transistor SRAM cell with bit-interleaving scheme in TMDFET technology	12
Design and analysis of polarization independent MMI based power splitter for PICs	12
Implementation of highly optimized optical all logic gates on a single chip using Ti-diffused lithium-niobate for high-speed processing in combinational circuits	12
Energy-efficient radiation hardened SRAM cell for low voltage terrestrial applications	12
Implication of unsafe writing on the MAGIC NOR gate	12
Linear regression combined KNN algorithm to identify latent defects for imbalance data of ICs	12
Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications	12
Structure design and optimization of SOI high-temperature pressure sensor chip	12
Impact of temperature and interface trapped charges variation on the Analog/RF and linearity of vertically extended drain double gate Si0.5Ge0.5 source tunnel FET	12
Electrical equivalent modeling of MEMS differential capacitive accelerometer	11
A chaos-based true random number generator based on OTA sharing and non-flipped folded Bernoulli mapping for high-precision ADC calibration	11
A front-end amplifier with tunable bandwidth and high value pseudo resistor for neural recording implants	11
Analysis of I–V-T characteristics of Be-doped AlGaAs Schottky diodes grown on (100) GaAs substrates by molecular beam epitaxy	11
Design and implementation of true random number generators based on semiconductor superlattice chaos	11
A −40 ​°C–125 ​°C, 1.08 ​ppm/°C, 918 ​nW bandgap voltage reference with segmented curvature compensation	11

Analysis on electrical parameters including temperature and interface trap charges in gate overlap Ge source step shape double gate TFET	11
On the design of robust, low power with high noise immunity quaternary circuits	11
Design and simulation of triple metal double-gate germanium on insulator vertical tunnel field effect transistor	11
Design of CMOS three-stage amplifiers for near-to-minimum settling-time	10
Capacitance response of concave well substrate touch-mode capacitive pressure sensor: Mathematical analysis and simulation	10
Electronically tunable higher-order quadrature oscillator employing CDBA	10
Design of low power Teager Energy Operator circuit for Sleep Spindle and K-Complex extraction	10
Impact of band gap and gate dielectric engineering on novel Si0.1Ge0.9-GaAs lateral N-type charge plasma based JLTFET	10
An ultra-low-power CNFET based dual V ternary dynamic Half Adder	10
New noise cancellation topology in common-gate LNAs	10
M-RO PUF: A portable pure digital RO PUF based on MUX unit	10
A 5 MHz-BW 71.7-dB SNDR two-step hybrid-domain ADC in 65-nm CMOS	10
Automated design and optimization flow for fully-differential switched capacitor amplifiers using recycling folded cascode OTA	10
RF/Analog performance of GaAs Multi-Fin FinFET with stress effect	10
Total ionizing dose hardness analysis of transistors in commercial 180 nm CMOS technology	10
Newly energy-efficient SRAM bit-cell using GAA CNT-GDI method with asymmetrical write and built-in read-assist schemes for QR code-based multimedia applications	10
Efficient hardware design of a deep U-net model for pixel-level ECG classification in healthcare device	10
Negative capacitance FETs for energy efficient and hardware secure logic designs	10
All optical clocked D flip flop for 1.72 Tb/s optical computing	10
CNFET based design of unbalanced ternary circuits using efficient shifting literals	10
Advanced implementation of Montgomery Modular Multiplier	9
Study the impact of graphene channel over conventional silicon on DC/analog and RF performance of DG dual-material-gate VTFET	9
Electromagnetic modelling and analysis of RF MEMS capacitive shunt switch for 5G applications	9
A C4.5 decision tree classifier based floorplanning algorithm for System-on-Chip design	9
Advances in neuromorphic devices for the hardware implementation of neuromorphic computing systems for future artificial intelligence applications: A critical review	9
Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET	9
Low to high-frequency noise behavior investigation of steeper sub-threshold swing NC-GeFinFET	9
Design of an efficient fully nonvolatile and radiation-hardened majority-based magnetic full adder using FinFET/MTJ	9
Next generation QCA technology based true random number generator for cryptographic applications	9
Orthogonal study and analysis of variance on a thermal management system for high-power LED package	9
Design, implementation, and estimation of MFCV for 4-different position of human body using FPGA	9
Dielectric surface roughness scattering induced crosstalk performance of coupled MCB interconnects	9
Low power CMOS differential ring VCO designs using dual delay stages in 0.13 ​μm technology for wireless applications	9
An ultra-low-power bulk-driven subthreshold super class-AB rail-to-rail CMOS OTA with enhanced small and large signal performance suitable for large capacitive loads	9
An improved GaN P-HEMT small-signal equivalent circuit with its parameter extraction	9
Fractional-order inverse filters revisited: Equivalence with fractional-order controllers	9
Triple bands Class-C voltage-controlled power oscillator based on high-quality factor asymmetry inductor	9
Electrical modeling of tapered TSV including MOS-Field effect and substrate parasitics: Analysis and application	9
Steep-subthreshold slope dual gate negative capacitance junction less FET with dead channel: TCAD approach for digital/ RF applications	9
Investigation of negative DIBL effect for ferroelectric-based FETs to improve MOSFETs and CMOS circuits	9
Modeling of TID-induced leakage current in ultra-deep submicron SOI NMOSFETs	9
An FPGA-based memristor emulator for artificial neural network	8
A hardware-efficient computing engine for FPGA-based deep convolutional neural network accelerator	8
Pair-Wise Urdhava-Tiryagbhyam (UT) Vedic Ternary multiplier	8
PFD with improved average gain and minimal blind zone combined with lock-in detection for fast settling PLLs	8
A 26-ppm/oC, 13.2-ppm/V, 0.11%-inaccuracy picowatt voltage reference with PVT compensation and fast startup	8
A 0.18 μm CMOS capacitor-less Low-Drop Out Voltage Regulator Compensated via the Bootstrap Flipped-Voltage Follower	8
Wide-band compact floating memristor emulator configuration with electronic/resistive adjustability	8
Current collapse degradation in GaN High Electron Mobility Transistor by virtual gate	8
A process variation resilient spintronic true random number generator for highly reliable hardware security applications	8
All-digital successive approximation TDC in time-mode signal processing	8
A 10-bit SAR ADC using novel LSB-first successive approximation for reduced bitcycles	8
A data-dependent energy reduction algorithm for SAR ADC using self-adaptive window	8
A robust architecture of physical unclonable function based on Memristor crossbar array	8
A comparative study on the accuracy of small-signal equivalent circuit modeling for large gate periphery GaN HEMT with different source to drain length and gate width	8
Experimental demonstration of 62.5 Mbps VLC link for healthcare infrastructures by incorporating limiting amplifier as an amplification scheme	8
Threshold voltage compensation 6T2C-pixel circuit design using OTFT for flexible display	8
Research progress and applications of memristor emulator circuits	8
A critical evaluation based on Lattice Boltzmann method of nanoscale thermal behavior inside MOSFET and SOI-MOSFET	8
An adaptive constant current and voltage mode P&O-based Maximum Power Point Tracking controller IC using 0.5-	8
Comprehensive characterization of vertical GaN-on-GaN Schottky barrier diodes	8
Impact of temperature variation on noise parameters and HCI degradation of Recessed Source/Drain Junctionless Gate All Around MOSFETs	8
Fabrication and high-frequency characterization of low-cost fan-in/out WLP technology with RDL for 2.5D/3D heterogeneous integration	8
A transient enhanced cap-less low-dropout regulator for wide range of load currents and capacitances	8
Vertical traversal approach towards TSVs optimisation over multilayer network on chip (NoC)	8
A multiple-sensitivity Hall sensor featuring a low-cost temperature compensation circuit	7
A 1-V 2.69-ppm/°C 0.8-μW bandgap reference with piecewise exponential curvature compensation	7
Design of radiation-hardened memory cell by polar design for space applications	7
On the design of OTA-C based field programmable analog arrays for continuous time low frequency applications	7
Negative capacitance FET based energy efficient and DPA attack resilient ultra-light weight block cipher design	7
Statistical based algorithm for reducing bit stuffing in the Controller Area Networks	7
Impact of biomolecules position and filling area on the sensitivity of hetero stack gate MOSFET	7
A push-pull FVF based LDO voltage regulator with slew rate enhancement at the gate of power transistor	7
Design of MNU-Resilient latches based on input-split C-elements	7
DDCC-based meminductor circuit with hard and smooth switching behaviors and its circuit implementation	7
A novel read decoupled 8T1M nvSRAM cell for near threshold operation	7
Reconfigurable FET-Based SRAM and Its Single Event Upset Performance Analysis Using TCAD Simulations	7
A digital background calibration scheme for non-linearity of SAR ADC using back-propagation algorithm	7
Low walk error multi-stage cascade comparator for TOF LiDAR application	7
Design and analysis of a dual gate tunnel FET with InGaAs source pockets for improved performance	7

Impact on performance of dual stack hetero- gated dielectric modulated TFET biosensor due to Si1-xGex pocket variation	7
Low mismatch high-speed charge pump for high bandwidth phase locked loops	7
Template attacks on ECC implementations using performance counters in CPU	7
Back-gate bias effect on the linearity of pocket doped FDSOI MOSFET	7
A fabrication of a low-power low-noise neural recording amplifier based on flipped voltage follower	7
An energy-efficient crypto-extension design for RISC-V	7
An optimized through-via bottom-up method for simultaneous-filling TSVS of different aspect-ratios and its potential application on high-frequency passive interposer	7
A second-order noise-shaping SAR ADC with error-feedback structure and data weighted averaging	7
An active CMOS optical receiver employing an inductor-less, low-noise and high-gain regulated cascode transimpedance amplifier	7
Mechanical strain and bias-stress compensated, 6T-1C pixel circuit for flexible AMOLED displays	7
A Class-E high-voltage pulse generator for ultrasound medical imaging applications	7
A 12-bit SAR ADC with a reversible VCM-based capacitor switching scheme	7
A 5T1C pixel circuit compensating mobility and threshold voltage variation	7
Threshold voltage modeling of Gaussian-doped Dual work function Material Cylindrical Gate-all-around (CGAA) MOSFET considering the effect of temperature and fixed interface trapped charges	7
A high reliability physically unclonable function based on multiple tunable ring oscillator	7
A 15 mV-input and 71%-efficiency boost converter with 22 mV output ripple for thermoelectric energy harvesting application	7
Open-Circuit Voltage Decay Simulations on Silicon and Gallium Arsenide p-n Homojunctions: Design Influences on Bulk Lifetime Extraction	7
Performance analysis of dielectrically modulated InSb/Si TFET based label free biosensor	7
Design and analysis of high-performance double-gate ZnO nano-structured thin-film ISFET for pH sensing applications	7
Naive Bayes classifier based on memristor nonlinear conductance	7
Computationally efficient memristor model based on Hann window function	7
Delay models and design guidelines for MCML gates with resistor or PMOS load	7
Hybrid small-signal modeling of GaN HEMTs based on improved genetic algorithm	6
A lightweight key renewal scheme based authentication protocol with configurable RO PUF for clustered sensor networks	6
Ultra-wideband Quadrature LC-VCO using Capacitor-Bank and backgate topology with on-chip spirally stacked inductor in 0.13 ​μm RF-CMOS process covering S–C bands	6
Comprehensive performance enhancement of a negative-capacitance nanosheet field-effect transistor with a steep sub-threshold swing at the sub-5-nm node	6
Radio frequency analog-to-digital converters: Systems and circuits review	6
Lifetime prediction and analysis of AlGaN/GaN HEMT devices under temperature stress	6
Design and implementation of robust and low-cost SRAM PUF using PMOS and linear shift register extractor	6
Negative capacitance based phase-transition FET for low power applications: Device-circuit co-design	6
Unified floating immittance emulator based on CCTA	6
UWB down-conversion mixer using an IM3 cancellation modified technique for zero and low IF applications	6
Impact of doping concentration and recess depth to achieve enhancement mode operation in β-Ga2O3 MOSFET	6
A communication-aware and predictive list scheduling algorithm for network-on-chip based heterogeneous muti-processor system-on-chip	6
Design of a high linear and ultra-wideband LNA using post distortion star feedback method	6
A 1 GS/s 10bit SAR ADC with background calibration in 28 nm CMOS	6
Improved modeling of flicker noise including velocity saturation effect in FinFETs and experimental validation	6
New pull-in voltage modelling of step structure RF MEMS switch	6
Study of multi-domain switching dynamics in negative capacitance FET using SPICE model	6
A novel method for reduction partial product tree in ternary multiplier	6
A 1.2-V 0.959-ppm/°C multi-section curvature-compensated bandgap voltage reference with trimming	6
Impact of interface trap charge and temperature on the performance of epitaxial layer tunnel field effect transistor	6
A novel dual-reference sensing scheme for computing in memory within STT-MRAM	6
In-situ characterization up to 100 ​GHz of insulators used in new 3D “System in Package on board” (SiPoB) technologies	6
A reconfigurable PUF structure with dual working modes based on entropy separation model	6
Stability and reliability of LTCC-based 5/12 ​V dual output DC-DC converter with high efficiency and small size	6
A 4H–SiC double trench MOSFET with split gate and integrated MPS diode	6
Column amplification stages in CMOS image sensors based on incremental sigma-delta ADCs	6
A reconfigurable and compact hardware architecture of CLEFIA block cipher with multi-configuration	6
A nano-watt power-on reset circuit with Brown-Out detection capability	6
Design and simulation of junctionless nanowire tunnel field effect transistor for highly sensitive biosensor	6
Exact and approximate multiplications for signal processing applications	6
Self-compliance and high-performance GeTe-based CBRAM with Cu electrode	6
A 2.44μs row conversion time 12-bit high-speed differential single-slope ADC with TDC applied to CMOS image sensor	6
An energy harvesting system for time-varying energy transducers with FOCV based dynamic and adaptive MPPT for 30 nW to 4 mW of input power range	6
A physics-based drain current model for Si1-xGex source/drain NT JLFET for enhanced hot carrier reliability with temperature measurement	6
Low voltage high performance super class AB OTA design using SCCM and DTMOS with enhanced slew rate and DC gain	6
Substrate BOX engineering to mitigate the self-heating induced degradation in nanosheet transistor	6
A low-power low-offset charge-sharing technique for double-tail comparators	6
Design of non-reciprocal device based on magnetic photonic crystal fiber with enhanced birefringence	6
A novel control circuit for piezoelectric energy harvesting	6
A comparative study on performance of junctionless Bulk SiGe and Si FinFET	6
Low-voltage bulk-driven self-cascode transistor based voltage differencing inverting buffered amplifier and its application as universal filter	6
Analysis and design of a reconfigurable wideband I/Q modulator and Ultra-Wideband I/Q demodulator for multi-standard applications	6
A link adaptation scheme for reliable downlink communications in narrowband IoT	6
Implementation of TRNG with SHA-3 for hardware security	6
CPW-fed elliptical shaped patch antenna with RF switches for wireless applications	6
A 3.66 μW 12-bit 1 MS/s SAR ADC with mismatch and offset foreground calibration	5
A 2.6 GΩ, 1.4 μVrms current-reuse instrumentation amplifier for wearable electrocardiogram monitoring	5
Local bit-line shared pass-gate 8T SRAM based energy efficient and reliable In-Memory Computing architecture	5
A high-sensitivity, low-noise dual-band RF energy harvesting and managing system for wireless bio-potential acquisition	5
A twice curvature compensated voltage reference with double frequency compensation	5
A low-power column-parallel cyclic ADC for CMOS image sensor with capacitance and current scaling	5
Effect of lateral straggle parameter on Hetero Junction Dual Gate Vertical TFET	5
MESO-ADC: The ADC design using MESO device	5
Fast-transient high-voltage buck-boost DC-DC conversion with low overshoot	5
A 128 Kb DAC-less 6T SRAM computing-in-memory macro with prioritized subranging ADC for AI edge applications	5
An innovative ultra-low voltage GOTFET based regenerative-latch Schmitt trigger	5
Optimization design of high-speed data acquisition system based on DMA double cache mechanism	5
Investigation and optimization of electro-thermal performance of Double Gate-All-Around MOSFET	5
A comparative first principles study of quantum well states in MgO barrier MTJs for STT-RAMs	5
A wideband low power merged balance-balun-LNA and I/Q-mixer	5
Ultra low power current mirror design with enhanced bandwidth	5
Recurrent neural networks models for analyzing single and multiple transient faults in combinational circuits	5
A 200 Hz-to-10 kHz bandwidth 11.83-ENOB level-crossing ADC with single continuous-time comparator	5
Revolutionizing wireless communication: A review perspective on design and optimization of RF MEMS switches	5
High gain 0.18 μm-GaAs MMIC cascode-distributed low-noise amplifier for UWB application	5
An augmented small-signal model of InP HBT with its analytical-based parameter extraction technique	5
Electronic microstructure and thermal conductivity modeling of semiconductor nanomaterials	5
Distribution optimization of thermal through-silicon via for 3D chip based on thermal-mechanic coupling	5
A self-compensated approach for ramp kickback noise in CMOS image sensor column parallel single slope ADC	5
Behavioral-level modeling of GaN HEMT small-signal intrinsic noise based on DE-SVR algorithm	5
Inductive noise coupling in multilayer superconductive ICs	5
A 24 ​GHz PLL with low phase noise for 60 ​GHz Sliding-IF transceiver in a 65-nm CMOS	5
Proposal and analysis of carbon nanotube based differential multibit through glass vias	5