Solid-State Electronics

Papers
(The median citation count of Solid-State Electronics is 0. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-11-01 to 2025-11-01.)
ArticleCitations
Tailoring the optoelectronic properties of PZT through the modulation of the thin film71
Smart-CX – Method of extraction of parasitic capacitances in ICs51
Low power consumption of non-volatile memory device by tunneling process engineering26
Compact I-V model for back-gated and double-gated TMD FETs25
Impedance sensors based on silicon-carbon films for detection low concentrations of organic vapors24
Numerical investigation of effect of Si separator in bottom dielectric isolation forksheet FETs via in-house TCAD process emulator and device simulator23
Analog behavior of V-FET operating in forward and reverse mode23
3xVDD-tolerant power-rail ESD clamp circuit for negative mixed-voltage interfaces21
Negative capacitance field-effect transistor with hetero-dielectric structure for suppression of reverse drain induced barrier lowering21
Si nanowire-based micro-capacitors fabricated with metal assisted chemical etching for integrated energy storage applications21
Engineering the contact resistance of copper/copper oxide via inserting a mediated molybdenum trioxide layer20
Editorial Board19
Editorial Board19
An enzymatic glucose biosensor using the BESOI MOSFET18
Understanding the impact of split-gate LDMOS transistors: Analysis of performance and hot-carrier-induced degradation18
Electrical instabilities in amorphous Si-Zn-sn-O thin film transistors under ultra-violet irradiation depending on oxygen content18
Non-local transport effects in semiconductors under low-field conditions18
A polylogarithmic model for thin-film transistors used in a CMOS inverter amplifier16
Design and verification of a hybrid electrostatic discharge model for Gate-Controlled silicon controlled rectifier16
On the asymmetry of the DC and low-frequency noise characteristics of vertical nanowire MOSFETs with bulk source contact15
Nanowire behavior under the influence of Polyoxometalates: A Comparative study of depletion and enhancement modes14
Experimental study of thermal coupling effects in FD-SOI MOSFET14
The mechanism of the enhanced intensity for polarization Coulomb field scattering in AlN/GaN heterostructure field effect transistors with submicron gate length13
Detailed electrical characterization of 200 mm CMOS compatible GaN/Si HEMTs down to deep cryogenic temperatures13
Editorial Board13
Electron-phonon calculations using a Wannier-based supercell approach: Applications to the monolayer MoS13
Self-aligned nitrogen doping via plasma treatment of NiO/β-Ga2O3 heterojunction diodes13
An implicit analytical surface potential based model for long channel symmetric double-gate MOSFETs accounting for oxide and interface trapped charges13
Mechanisms of negative bias instability of commercial SiC MOSFETs observed by current transients12
Extraction of small-signal equivalent circuit for de-embedding of 3D vertical nanowire transistor12
Electron mobility distribution in FD-SOI MOSFETs using a NEGF-Poisson approach12
Smart Material Implication Using Spin-Transfer Torque Magnetic Tunnel Junctions for Logic-in-Memory Computing12
Analysis of a Hall-Corbino disk plate having a point current source at the center12
An ultra low power spiking neural encoder of microwave signals12
Analytical model based estimation of line edge roughness induced V<12
Thermal cross-coupling effects in side-by-side UTBB-FDSOI transistors11
Spatially resolved ionization current measurements using an active-matrix transimpedance amplifier array11
Estimation of the energy levels of the donor–acceptor polymers of organic solar cells using cyclic voltammetry11
Novel Y-function methodology parameter estimation from weak to strong inversion operation11
Study of RRAM devices with PECVD silicon-oxide resistive switching layer11
Temperature-dependence of current gain and turn-on voltages of GaAs-based HBTs with different base layers grown by MOCVD11
Impact of substrate resistivity on spiral inductors at mm-wave frequencies11
Ab initio study of electron mobility in V211
Evaluation of the effective channel length of Junctionless nanowire transistors with different drain bias through the gate capacitance10
Electrical characteristics of n-type vertically stacked nanowires operating up to 600 K10
Trap and self-heating effect based reliability analysis to reveal early aging effect in nanosheet FET10
Thermal coupling between FD-SOI FETs at cryogenic temperatures10
Thermal annealing behavior of InP-based HEMT damaged by proton irradiation10
Epitaxial p+pn+ vertical short diodes for microbolometers10
Equivalence of proton-induced displacement damage in InP-based HEMT10
Reactive sputtering deposited α-MoO3 thin films for forming-free resistive random-access memory10
Double Reference Layer STT-MRAM Structures with Improved Performance10
3D (micro/nano) CdO/p-Si co-doped Zn and La heterojunctions perform as solar light photodetectors10
Editorial Board10
Curvature based feature detection for hierarchical grid refinement in TCAD topography simulations10
The impact of electron phonon scattering on transport properties of topological insulators: A first principles quantum transport study9
TCAD-Based RF performance prediction and process optimization of 3D monolithically stacked complementary FET9
Editorial Board9
Self-similar reconfigurable low-pass MEMS filters using coplanar waveguide based on silicon9
C-V measurement and modeling of double-BOX Trap-Rich SOI substrate9
TCAD-based design and verification of the components of a 200 V GaN-IC platform9
Impact of the leakage current of an AND-type synapse array on spiking neural networks9
Editorial Board8
The core-shell junctionless MOSFET8
On the accuracy of the formula used to extract trap density in MOSFETs from 1/f noise8
Design of a NMOS-triggered SCR for dual-direction low-voltage ESD protection8
Editorial Board8
Editorial Board8
28 nm FD-SOI MEOL parasitic capacitance segmentation using electrical testing and semiconductor process modeling8
A unified 2-D model for nanowire junctionless accumulation and inversion mode MOSFET in quasi-ballistic regime8
In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets8
Optimized emitter-base interface cleaning for advanced Heterojunction Bipolar Transistors8
On the noise-sensitivity of entangling quantum logic operations implemented with a semiconductor quantum dot platform8
Performance potential of transistors based on tellurium nanowire arrays: A quantum transport study8
Investigation and Modeling of Multifrequency CV characteristics for 10-nm Bulk FinFETs at Cryogenic Temperatures8
Recovering the carrier number conservation in SPICE simulation of PIN diodes and IGBT devices8
Pragmatic OxRAM compact model ready to use for design studies7
Investigation on dielectric wall variations in Forksheet FETs7
Impacts of trench angle on the performance of trench super-junction vertical double-diffused metal-oxide-semiconductor7
Theoretical study of extreme ultraviolet pellicles with nanometer thicknesses7
Understanding negative capacitance physical mechanism in organic ferroelectric capacitor7
Graph-based Compact Modeling (GCM) of CMOS transistors for efficient parameter extraction: A machine learning approach7
Hierarchical Mixture-of-Experts approach for neural compact modeling of MOSFETs7
Temperature influence on analog parameters of vertical nanowire transistors7
Model of threshold voltage and drain current in core-shell junctionless transistor on FD-SOI7
Behavioral SPICE model for memristive crosspoint arrays operating in the nonlinear transport regime7
Enhanced photoresponse in Cu/n-Si Schottky photodetectors via RF sputtering: A comparative study with thermal evaporation7
Vertical GaN diode BV maximization through rapid TCAD simulation and ML-enabled surrogate model7
Compact modeling of photonic devices in Verilog-A for integrated circuit design7
A wireless stimulator system-on-chip with an optically writable ID for addressable cortical microimplants7
A multi-energy level agnostic approach for defect generation during TDDB stress7
Sensitivity implications for programmable transistor based 1T-DRAM6
Switching limits of top-gated carbon nanotube field-effect transistors6
Palladium selenide as cathode for dye-sensitized solar cell: Effect of palladium content6
Corrigendum to “In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets” [Solid-State Electron. 201(2023) 10859]6
A novel SOI-LDMOS with field plate auxiliary doping layer that has improved breakdown voltage6
Characterization of DC performance and low-frequency noise of an array of nMOS Forksheets from 300 K to 4 K6
TCAD numerical modeling of negative capacitance ferroelectric devices for radiation detection applications6
Preparation and electrical characteristics of transparent thin film transistors with sputtered aluminum and phosphorus co-doped indium-zinc-oxide channel layer6
Estimation of the emission characteristics of solid-state incandescent light emitting devices by linear regression of spectral radiance6
Improved electrical performance of InAlN/GaN high electron mobility transistors with forming gas annealing6
Suppression of de-trapping by remanent polarization in dual-mechanism flash memory6
Sensitivity enhancement in OCD metrology by optimizing azimuth angle based on the RCWA simulation6
Sensing performance of Ti/TiO2 nanosheets/Au capacitive device: Implication of resonant frequency6
An improved subthreshold swing expression accounting for back-gate bias in FDSOI FETs6
Effects of electrode materials on solution-processed polyvinylidene fluoride-based piezoelectric nanogenerators: Do they matter?6
Performance of flexible In0.7Ga0.3As MOSFETs by utilizing liquid polyimide (LPI) transfer with effective mobility of 3,667 cm2/V-s6
Implementation of device-to-device and cycle-to-cycle variability of memristive devices in circuit simulations6
Enhanced linearity of AlGaN/GaN HEMTs via dual-gate configuration for RF amplifier applications6
Extraction of effective mobility of In Ga As/In Al As quantum well high-electron-mobility transistors on InP substrate5
Building robust machine learning force fields by composite Gaussian approximation potentials5
Quantum simulations of MoS2 field effect transistors including contact effects5
Compact modeling of Schottky barrier field-effect transistors at deep cryogenic temperatures5
Editorial to Letters from SISPAD-20225
Influence of fin width variation on the electrical characteristics of n-type junctionless nanowire transistors at high temperatures5
Surrogate models for device design using sample-efficient Deep Learning5
Hydrothermally formed copper oxide (CuO) thin films for resistive switching memory devices5
Editorial Board5
Sub micro-accelerometer based on spintronic technology: A design optimization5
Investigation of reconfigurable logic gate using integrated amorphous InGaZnO ReRAM and thin-film transistor5
In-situ fluorine-doped ZnSnO thin film and thin-film transistor5
Bias stress stabilities of PMMA-passivated indium-gallium-zinc-oxide thin-film transistors after 100 °C steam exposure5
Resistive Switching phenomenon in FD-SOI Ω-Gate FETs: Transistor performance recovery and back gate bias influence5
Precise channel temperature prediction in AlGaN/GaN HEMTs via closed-form empirical expression5
Preliminary results on industrial 28nm FD-SOI phase change memory at cryogenic temperature5
MoS2-based multiterminal ionic transistor with orientation-dependent STDP learning rules5
An eco-friendly bandgap engineering of semiconductor graphene oxide5
Express method of electro-physical parameters extraction for power Schottky diodes5
A simulation methodology for superconducting qubit readout fidelity5
Influence of N-type substrate’s bias potential on electrical characteristics of 4H-SiC integrated devices for All-SiC ICs5
Demonstration of an n-ZnO/p-Si/n-Si heterojunction bipolar phototransistor for X-ray detection5
A compact physical expression for the static drain current in heterojunction barrier CNTFETs5
Synaptic array using multi-level AND flash memory cells for hardware-based neural networks5
Achieving long-term and short-term synaptic plasticity in adaptive ANNs: A memristor circuit design with switchable dual-mode5
Combined effects of NH3 and NF3 post plasma treatment on the performance of spray coated ZnO thin film transistors5
Unified RTN and BTI statistical compact modeling from a defect-centric perspective5
Cryogenic temperature DC-IV measurements and compact modeling of n-channel bulk FinFETs with 3–4 nm wide fins and 20 nm gate length for quantum computing applications4
Investigation on the performance limits of Dirac-source FETs4
Opportunity to achieve an efficient SiC/SiO2 interface N passivation by tuning the simultaneous oxidation modes during the SiC surface nitridation in N2 + O2 annealing4
Analysis on effect of hot-carrier-induced degradation of NPT-IGBT4
Interface effects in ultra-scaled MRAM cells4
Investigation and optimization of traps properties in Al2O3/SiO2 dielectric stacks using conductance method4
Impact of the channel doping on the low-frequency noise of gate-all-around silicon vertical nanowire pMOSFETs4
CMOS inverter performance degradation and its correlation with BTI, HCI and OFF state MOSFETs aging4
Poisson-Schrödinger simulation and analytical modeling of inversion charge in FDSOI MOSFET down to 0 K – Towards compact modeling for cryo CMOS application4
Improving cell current in 3D NAND flash memory with fixed oxide charge4
Impact of Gate Oxide Thickness on Flicker Noise (1/f) in PDSOI n-channel FETs4
Investigating random discrete dopant-induced variability in cryogenic gate-all-around nanosheet FETs: A quantum transport simulation study4
A simple method for the photometric characterization of organic light-emitting diodes4
Stochastic based compact model to predict highly variable electrical characteristics of organic CBRAM devices4
Determination of source series resistances for InP HEMT under normal bias condition4
Mitigating LeTID-Induced performance loss through high-frequency AC carrier injection: Architecture-dependent recovery trends in crystalline silicon solar cells4
Analysis of the performance of Nb2O5-doped SiO2-based MIM devices for memory and neural computation applications4
Editorial: Letters from the 8th Joint International EUROSOI workshop and International Conference on Ultimate Integration on Silicon4
Simulation of low frequency noise in buried-channel MOSFET by a Green’s function-based numerical trap level model4
1540 V 21.8mΩ·cm2 4H-SiC lateral MOSFETs with DOUBLE RESURFs for power integration applications4
Editorial Board4
Effect of Al2O3 on the operation of SiNX-based MIS RRAMs4
Simulation study on physical parameters ruling unipolar resistance switching of sputter-deposited silicon oxide film on Si substrate4
Impact of series resistance on the drain current variability in inversion mode and junctionless nanowire transistors4
Degradation mechanisms for static and dynamic characteristics in 1.2 kV 4H-SiC MOSFETs under repetitive short-circuit tests4
Improvement of electrical performance in Normally-Off GaN MOSFET with regrown AlGaN layer on the Source/Drain region4
Assessment of ion-sensitivity of Si3N4 based feedback field effect transistor using snap-back characteristics4
Modelling of self-heating effect in FDSOI and bulk MOSFETs operated in deep cryogenic conditions4
Non-Quasi-Static modeling and methodology in fully depleted SOI MOSFET for L-UTSOI model4
Study of TiN/Ti/HfO2/W resistive switching devices: characterization and modeling of the set and reset transitions using an external capacitor discharge4
Modeling electrical resistivity of CrSi thin films4
Editorial. Special issue. EUROSOI-ULIS 20234
Competition between heating and cooling during dynamic self-heating degradation of amorphous InGaZnO thin-film transistors3
About electron transport and spin control in semiconductor devices3
Nanoscale SOI strain engineering: STRASS-enabled local stress optimization3
Impact of post metallization annealing (PMA) on the electrical properties of Ge nMOSFETs with ZrO2 dielectric3
Computational model for predicting structural stability and stress transfer of a new SiGe stressor technique for NMOS devices3
A differential OTP memory based highly unique and reliable PUF at 180 nm technology node3
Application of explainable AI on deep learning-based gate length scalable IV parameter extractor for BSIM-IMG3
Experimental assessment of gate-induced drain leakage in SOI stacked nanowire and nanosheet nMOSFETs at high temperatures3
Hierarchical simulation of nanosheet field effect transistor: NESS flow3
Switching layer optimization in Co-based CBRAM for >105 memory window in sub-100 µA regime3
An accurate machine learning model to study the impact of realistic metal grain granularity on Nanosheet FETs3
Layout dependent hot-carrier-injection-induced pLDMOS degradation from a non-destructive characterization viewpoint3
Strong quantization of current-carrying electron states in δ-layer s3
Analysis of back-gate bias impact on 22 nm FDSOI SRAM cell3
Modulation of ballistic injection velocity in phosphorene nanodevices by bias and confinement effects3
Addressing source to drain tunneling in extremely scaled Si-transistors using negative capacitance3
Reliable parameter extraction method applied to an enhanced GaN HEMT small-signal model3
Analog resistive switching behavior in BiCoO3 thin film3
Spin-orbit torque magnetic tunnel junction based on 2-D materials: Impact of bias-layer on device performance3
One-step variation included compact modeling with conditional variational autoencoder3
Editorial Board3
Mobility and intrinsic performance of silicon-based nanosheet FETs at 3 nm CMOS and beyond3
Efficient atomistic simulations of lateral heterostructure devices with metal contacts3
Design of auto-store circuit for nvSRAM with SONOS access transistor3
Current annealing to improve drain output performance of β-Ga2O3 field-effect transistor3
Avalanche breakdown and quenching in Ge SPAD using 3D Monte Carlo simulation3
Novel experimental methodologies to reconcile large- and small-signal responses of Hafnium-based Ferroelectric Tunnel Junctions3
A simulation physics-guided neural network for predicting semiconductor structure with few experimental data3
Corrigendum to “Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures” [Solid State Electron. 193 (2022) 108291]3
Impact of Device Layout on Self-Heating Extraction in MOSFETs3
Improved self-heating extraction with RF technique at cryogenic temperatures3
Editorial Board3
Influence of temperature inhomogeneity and trap charge on current imbalance of SiC MOSFETs3
Perovskite-based optoelectronic artificial synaptic thin-film transistor3
GaN p-i-n ultraviolet photodetectors grown on homogenous GaN bulk substrates3
Quantum element method for multi-dimensional nanostructures enabled by a projection-based learning algorithm3
Unveiling the mechanism behind the negative capacitance effect in Hf0.5Zr0.5O2-Based ferroelectric gate stacks and introducing a Circuit-Compatible hybrid compact model for Leakage-Aware NCFETs2
Deep spiking neural networks with integrate and fire neuron using steep switching device2
Electron and spin transport in semiconductor and magnetoresistive devices2
On the breakdown voltage temperature dependence of high-voltage power diodes passivated with diamond-like carbon2
Back-gate effects on DC performance and carrier transport in 22 nm FDSOI technology down to cryogenic temperatures2
High-densities of free holes in homoepitaxial n-GaN induced by fluorine-plasma ion implantation2
Evidence of trapping and electrothermal effects in vertical junctionless nanowire transistors2
An All-GaN cascode device with integrated plane-parallel capacitor with high dynamic breakdown voltage and high switching performance2
A novel method used to prepare PN junction by plasmon generated under pulsed laser irradiation on silicon chip2
Opportunity for band alignment manipulation of perovskite oxide stacks by interfacial dipole layer formation2
Pinning voltage model of vertical pinned photodiode for Dual-Pixel image sensor2
Thickness-dependent dielectric breakdown in thick amorphous SiO2 capacitors2
A composite model of memristors based on barrier and dopant drift mechanisms2
Improved inter-device variability in graphene liquid gate sensors by laser treatment2
Silicon nitride resistance switching MIS cells doped with silicon atoms2
Si/Ge1x2
A well-conditioned surface potential equation for dynamically depleted SOI MOS devices accounting for the front-depletion/back-accumulation operation mode2
Comparison of impact of channel length- and width-directional taper angle in nanosheet and forksheet FETs for 2 nm node and beyond2
Comprehensive evaluation of torques in ultra-scaled MRAM devices2
Design methodology of a 28 nm FD-SOI capacitive feedback RF LNA based on the ACM model and look-up tables2
Editorial Board2
Novel Y-function based strategy for parameter extraction in S/D asymmetric architecture devices and low frequency noise characterization in GAA Si VNW pMOSFETs2
A computational study of AlScN-based ferroelectric tunnel junction2
Stress management in freestanding membranes obtained by ion implantation induced delamination2
A novel methodology for neural compact modeling based on knowledge transfer2
Performance of FDSOI double-gate dual-doped reconfigurable FETs2
Harnessing charge injection in Kelvin probe force microscopy for the evaluation of oxides2
Efficient circuit simulation of a memristive crossbar array with synaptic weight variability2
Editorial Board2
Approximate H-transformation for numerical stabilization of a deterministic Boltzmann transport equation solver based on a spherical harmonics expansion2
Methodology for parameters extraction with undoped junctionless EZ-FETs2
Mechanism of polarization “Wake-Up” in ferroelectric Hafnia-Zirconia thin films2
Effect of SOI substrate on silicon nitride resistance switching using MIS structure2
Deep insights on new embedded resistance and gated diode on thin film silicon BIMOS device with and without external polysilicon resistance for advanced ESD protection in FD-SOI technology2
SPICE simulation of the time-dependent clustering model for dielectric breakdown2
Simulation process flow for the implementation of industry-standard FD-SOI quantum dot devices2
Retention failure recovery technique for 3D TLC NAND flash memory via wordline (WL) interference2
The study on influence factors of contact properties of metal-MoS2 interfaces2
Influence of gate-source/drain overlap on FeFETs2
Temperature- and variability-aware compact modeling of ferroelectric FDSOI FET for memory and emerging applications2
Enabling medium thick gate oxide devices in 22FDX® technology for switch and high-performance amplifier application2
An efficient temperature dependent compact model for nanosheet FET for neuromorphic computing circuit2
Drain-bias dependence of low-frequency Y22 signals for Fe-related GaN traps in GaN HEMTs with different Fe doping concentrations2
Low-frequency noise characterization of positive bias stress effect on the spatial distribution of trap in β-Ga2O3 FinFET2
Influence of gate work function variations on characteristics of fin-shaped silicon quantum dot device with multi-gate under existence of gate electrostatic coupling1
Negative capacitance and negative dielectric behavior of MIS device with Rhenium-Type Schottky contacts1
0.10905289649963