Solid-State Electronics

Papers
(The median citation count of Solid-State Electronics is 2. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-08-01 to 2025-08-01.)
ArticleCitations
Accurate statistical extraction of AlGaN/GaN HEMT device parameters using the Y-function65
An enzymatic glucose biosensor using the BESOI MOSFET49
Design and verification of a hybrid electrostatic discharge model for Gate-Controlled silicon controlled rectifier26
The mechanism of the enhanced intensity for polarization Coulomb field scattering in AlN/GaN heterostructure field effect transistors with submicron gate length24
Understanding the impact of split-gate LDMOS transistors: Analysis of performance and hot-carrier-induced degradation23
Si nanowire-based micro-capacitors fabricated with metal assisted chemical etching for integrated energy storage applications22
Non-local transport effects in semiconductors under low-field conditions21
Smart-CX – Method of extraction of parasitic capacitances in ICs20
Low power consumption of non-volatile memory device by tunneling process engineering19
Editorial Board19
Impedance sensors based on silicon-carbon films for detection low concentrations of organic vapors19
Tailoring the optoelectronic properties of PZT through the modulation of the thin film19
Electrical instabilities in amorphous Si-Zn-sn-O thin film transistors under ultra-violet irradiation depending on oxygen content18
Engineering the contact resistance of copper/copper oxide via inserting a mediated molybdenum trioxide layer18
Editorial Board18
On the asymmetry of the DC and low-frequency noise characteristics of vertical nanowire MOSFETs with bulk source contact17
A polylogarithmic model for thin-film transistors used in a CMOS inverter amplifier16
Analog behavior of V-FET operating in forward and reverse mode16
Experimental study of thermal coupling effects in FD-SOI MOSFET14
Compact I-V model for back-gated and double-gated TMD FETs14
Robustness of using degree of match in performing analog multiplication with spin-torque oscillators13
Negative capacitance field-effect transistor with hetero-dielectric structure for suppression of reverse drain induced barrier lowering13
Editorial Board13
Electron-phonon calculations using a Wannier-based supercell approach: Applications to the monolayer MoS12
Extraction of small-signal equivalent circuit for de-embedding of 3D vertical nanowire transistor12
Analysis of a Hall-Corbino disk plate having a point current source at the center12
Thermal cross-coupling effects in side-by-side UTBB-FDSOI transistors12
Analytical model based estimation of line edge roughness induced V<12
Detailed electrical characterization of 200 mm CMOS compatible GaN/Si HEMTs down to deep cryogenic temperatures12
An ultra low power spiking neural encoder of microwave signals12
Smart Material Implication Using Spin-Transfer Torque Magnetic Tunnel Junctions for Logic-in-Memory Computing12
Novel Y-function methodology parameter estimation from weak to strong inversion operation12
An implicit analytical surface potential based model for long channel symmetric double-gate MOSFETs accounting for oxide and interface trapped charges11
Curvature based feature detection for hierarchical grid refinement in TCAD topography simulations11
Ab initio study of electron mobility in V211
Impact of substrate resistivity on spiral inductors at mm-wave frequencies11
Mechanisms of negative bias instability of commercial SiC MOSFETs observed by current transients11
Quantum capacitance transient phenomena in high-k dielectric armchair graphene nanoribbon field-effect transistor model11
Electron mobility distribution in FD-SOI MOSFETs using a NEGF-Poisson approach11
Spatially resolved ionization current measurements using an active-matrix transimpedance amplifier array11
Detailed low frequency noise assessment on GAA NW n-channel FETs11
28 nm FD-SOI MEOL parasitic capacitance segmentation using electrical testing and semiconductor process modeling10
Pragmatic OxRAM compact model ready to use for design studies10
Editorial Board10
3D (micro/nano) CdO/p-Si co-doped Zn and La heterojunctions perform as solar light photodetectors10
A unified 2-D model for nanowire junctionless accumulation and inversion mode MOSFET in quasi-ballistic regime10
TCAD-Based RF performance prediction and process optimization of 3D monolithically stacked complementary FET10
Editorial Board10
C-V measurement and modeling of double-BOX Trap-Rich SOI substrate10
In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets10
Editorial Board10
Editorial Board10
Recovering the carrier number conservation in SPICE simulation of PIN diodes and IGBT devices10
Introducing effective temperature into Arrhenius equation with Meyer-Neldel rule for describing both Arrhenius and non-Arrhenius dependent drain current of amorphous InGaZnO TFTs10
Investigation and Modeling of Multifrequency CV characteristics for 10-nm Bulk FinFETs at Cryogenic Temperatures10
TCAD-based design and verification of the components of a 200 V GaN-IC platform9
Design of a NMOS-triggered SCR for dual-direction low-voltage ESD protection9
Graph-based Compact Modeling (GCM) of CMOS transistors for efficient parameter extraction: A machine learning approach9
Optimized emitter-base interface cleaning for advanced Heterojunction Bipolar Transistors9
Modeling of the degradation of CMOS inverters under pulsed stress conditions from ‘on-the-fly’ measurements9
Impact of the leakage current of an AND-type synapse array on spiking neural networks9
Equivalence of proton-induced displacement damage in InP-based HEMT9
Electrical characteristics of n-type vertically stacked nanowires operating up to 600 K9
Double Reference Layer STT-MRAM Structures with Improved Performance9
On the noise-sensitivity of entangling quantum logic operations implemented with a semiconductor quantum dot platform9
Thermal annealing behavior of InP-based HEMT damaged by proton irradiation9
Compact modeling of photonic devices in Verilog-A for integrated circuit design9
Self-similar reconfigurable low-pass MEMS filters using coplanar waveguide based on silicon9
Stability and Vmin<8
Reactive sputtering deposited α-MoO3 thin films for forming-free resistive random-access memory8
Hierarchical Mixture-of-Experts approach for neural compact modeling of MOSFETs8
Impacts of trench angle on the performance of trench super-junction vertical double-diffused metal-oxide-semiconductor8
Preparation and electrical characteristics of transparent thin film transistors with sputtered aluminum and phosphorus co-doped indium-zinc-oxide channel layer8
Sensitivity implications for programmable transistor based 1T-DRAM8
On the accuracy of the formula used to extract trap density in MOSFETs from 1/f noise8
The impact of electron phonon scattering on transport properties of topological insulators: A first principles quantum transport study8
Thermal coupling between FD-SOI FETs at cryogenic temperatures8
Trap and self-heating effect based reliability analysis to reveal early aging effect in nanosheet FET8
Editorial Board8
Effects of electrode materials on solution-processed polyvinylidene fluoride-based piezoelectric nanogenerators: Do they matter?8
A wireless stimulator system-on-chip with an optically writable ID for addressable cortical microimplants8
Performance potential of transistors based on tellurium nanowire arrays: A quantum transport study8
The core-shell junctionless MOSFET8
Editorial Board8
Suppression of de-trapping by remanent polarization in dual-mechanism flash memory8
Sensitivity enhancement in OCD metrology by optimizing azimuth angle based on the RCWA simulation8
Understanding negative capacitance physical mechanism in organic ferroelectric capacitor8
Vertical GaN diode BV maximization through rapid TCAD simulation and ML-enabled surrogate model8
Corrigendum to “In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets” [Solid-State Electron. 201(2023) 10859]8
Switching limits of top-gated carbon nanotube field-effect transistors7
Sensing performance of Ti/TiO2 nanosheets/Au capacitive device: Implication of resonant frequency7
Palladium selenide as cathode for dye-sensitized solar cell: Effect of palladium content7
Hydrothermally formed copper oxide (CuO) thin films for resistive switching memory devices7
An improved subthreshold swing expression accounting for back-gate bias in FDSOI FETs7
An eco-friendly bandgap engineering of semiconductor graphene oxide7
Bias stress stabilities of PMMA-passivated indium-gallium-zinc-oxide thin-film transistors after 100 °C steam exposure7
A compact physical expression for the static drain current in heterojunction barrier CNTFETs7
TCAD numerical modeling of negative capacitance ferroelectric devices for radiation detection applications7
MoS2-based multiterminal ionic transistor with orientation-dependent STDP learning rules7
A novel SOI-LDMOS with field plate auxiliary doping layer that has improved breakdown voltage7
Performance of flexible In0.7Ga0.3As MOSFETs by utilizing liquid polyimide (LPI) transfer with effective mobility of 3,667 cm2/V-s7
Implementation of device-to-device and cycle-to-cycle variability of memristive devices in circuit simulations7
Enhanced linearity of AlGaN/GaN HEMTs via dual-gate configuration for RF amplifier applications7
Editorial to Letters from SISPAD-20227
A multi-energy level agnostic approach for defect generation during TDDB stress7
Estimation of the emission characteristics of solid-state incandescent light emitting devices by linear regression of spectral radiance7
Improved electrical performance of InAlN/GaN high electron mobility transistors with forming gas annealing7
Combined effects of NH3 and NF3 post plasma treatment on the performance of spray coated ZnO thin film transistors7
Characterization of DC performance and low-frequency noise of an array of nMOS Forksheets from 300 K to 4 K7
Extraction of effective mobility of In Ga As/In Al As quantum well high-electron-mobility transistors on InP substrate7
Theoretical study of extreme ultraviolet pellicles with nanometer thicknesses7
Express method of electro-physical parameters extraction for power Schottky diodes7
Investigation of the anomalous effect of the AC-signal frequency on flat-band voltage of Al/HfO2/SiO2/Si structures7
Editorial Board6
Investigation of reconfigurable logic gate using integrated amorphous InGaZnO ReRAM and thin-film transistor6
Precise channel temperature prediction in AlGaN/GaN HEMTs via closed-form empirical expression6
Building robust machine learning force fields by composite Gaussian approximation potentials6
A simulation methodology for superconducting qubit readout fidelity6
In-situ fluorine-doped ZnSnO thin film and thin-film transistor6
Poisson-Schrödinger simulation and analytical modeling of inversion charge in FDSOI MOSFET down to 0 K – Towards compact modeling for cryo CMOS application6
Editorial: Letters from the 8th Joint International EUROSOI workshop and International Conference on Ultimate Integration on Silicon6
Simulation study on physical parameters ruling unipolar resistance switching of sputter-deposited silicon oxide film on Si substrate6
CMOS inverter performance degradation and its correlation with BTI, HCI and OFF state MOSFETs aging6
Editorial Board6
Surrogate models for device design using sample-efficient Deep Learning6
Unified RTN and BTI statistical compact modeling from a defect-centric perspective6
Synaptic array using multi-level AND flash memory cells for hardware-based neural networks6
Sub micro-accelerometer based on spintronic technology: A design optimization6
1540 V 21.8mΩ·cm2 4H-SiC lateral MOSFETs with DOUBLE RESURFs for power integration applications6
Effect of Al2O3 on the operation of SiNX-based MIS RRAMs6
Simulation of low frequency noise in buried-channel MOSFET by a Green’s function-based numerical trap level model6
Compact modeling of Schottky barrier field-effect transistors at deep cryogenic temperatures6
Cryogenic temperature DC-IV measurements and compact modeling of n-channel bulk FinFETs with 3–4 nm wide fins and 20 nm gate length for quantum computing applications6
Demonstration of an n-ZnO/p-Si/n-Si heterojunction bipolar phototransistor for X-ray detection6
Inversion layer electron mobility distribution in fully-depleted silicon-on-insulator MOSFETs6
Influence of fin width variation on the electrical characteristics of n-type junctionless nanowire transistors at high temperatures6
Impact of series resistance on the drain current variability in inversion mode and junctionless nanowire transistors6
Impact of Gate Oxide Thickness on Flicker Noise (1/f) in PDSOI n-channel FETs6
Resistive Switching phenomenon in FD-SOI Ω-Gate FETs: Transistor performance recovery and back gate bias influence6
Perovskite-based optoelectronic artificial synaptic thin-film transistor5
Modelling of self-heating effect in FDSOI and bulk MOSFETs operated in deep cryogenic conditions5
Experimental assessment of gate-induced drain leakage in SOI stacked nanowire and nanosheet nMOSFETs at high temperatures5
Modeling electrical resistivity of CrSi thin films5
Computational model for predicting structural stability and stress transfer of a new SiGe stressor technique for NMOS devices5
Editorial. Special issue. EUROSOI-ULIS 20235
A differential OTP memory based highly unique and reliable PUF at 180 nm technology node5
Effect of SOI substrate on silicon nitride resistance switching using MIS structure5
Editorial Board5
Fabrication and modelling of MInM diodes with low turn-on voltage5
Interface effects in ultra-scaled MRAM cells5
Comprehensive evaluation of torques in ultra-scaled MRAM devices5
Enhancing the temporal response of modified porous silicon-based CO gas sensor5
Improvement of electrical performance in Normally-Off GaN MOSFET with regrown AlGaN layer on the Source/Drain region5
Analysis and modeling of anomalous flicker noise in long channel halo MOSFETs5
Switching layer optimization in Co-based CBRAM for >105 memory window in sub-100 µA regime5
A simulation physics-guided neural network for predicting semiconductor structure with few experimental data5
Spin-orbit torque magnetic tunnel junction based on 2-D materials: Impact of bias-layer on device performance5
Investigation and optimization of traps properties in Al2O3/SiO2 dielectric stacks using conductance method5
Analysis of back-gate bias impact on 22 nm FDSOI SRAM cell5
Improving cell current in 3D NAND flash memory with fixed oxide charge5
Analog resistive switching behavior in BiCoO3 thin film5
Non-Quasi-Static modeling and methodology in fully depleted SOI MOSFET for L-UTSOI model5
Stochastic based compact model to predict highly variable electrical characteristics of organic CBRAM devices5
Avalanche breakdown and quenching in Ge SPAD using 3D Monte Carlo simulation5
Opportunity to achieve an efficient SiC/SiO2 interface N passivation by tuning the simultaneous oxidation modes during the SiC surface nitridation in N2 + O2 annealing5
Modeling current and voltage peaks generation in complementary resistive switching devices5
Quantum element method for multi-dimensional nanostructures enabled by a projection-based learning algorithm5
Improved self-heating extraction with RF technique at cryogenic temperatures5
Determination of source series resistances for InP HEMT under normal bias condition5
Hierarchical simulation of nanosheet field effect transistor: NESS flow5
Study of TiN/Ti/HfO2/W resistive switching devices: characterization and modeling of the set and reset transitions using an external capacitor discharge5
Layout dependent hot-carrier-injection-induced pLDMOS degradation from a non-destructive characterization viewpoint5
Editorial Board5
Influence of temperature inhomogeneity and trap charge on current imbalance of SiC MOSFETs5
Negative capacitance enables GAA scaling VDD to 0.5 V5
Investigating random discrete dopant-induced variability in cryogenic gate-all-around nanosheet FETs: A quantum transport simulation study5
Current annealing to improve drain output performance of β-Ga2O3 field-effect transistor5
A simple method for the photometric characterization of organic light-emitting diodes5
Analysis of the performance of Nb2O5-doped SiO2-based MIM devices for memory and neural computation applications5
Degradation mechanisms for static and dynamic characteristics in 1.2 kV 4H-SiC MOSFETs under repetitive short-circuit tests5
Competition between heating and cooling during dynamic self-heating degradation of amorphous InGaZnO thin-film transistors5
Addressing source to drain tunneling in extremely scaled Si-transistors using negative capacitance5
Analysis on effect of hot-carrier-induced degradation of NPT-IGBT5
Efficient atomistic simulations of lateral heterostructure devices with metal contacts5
About electron transport and spin control in semiconductor devices5
Corrigendum to “Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures” [Solid State Electron. 193 (2022) 108291]5
Design of auto-store circuit for nvSRAM with SONOS access transistor5
Impact of the channel doping on the low-frequency noise of gate-all-around silicon vertical nanowire pMOSFETs5
On the breakdown voltage temperature dependence of high-voltage power diodes passivated with diamond-like carbon5
Modulation of ballistic injection velocity in phosphorene nanodevices by bias and confinement effects5
An accurate machine learning model to study the impact of realistic metal grain granularity on Nanosheet FETs4
Methodology for parameters extraction with undoped junctionless EZ-FETs4
GaN p-i-n ultraviolet photodetectors grown on homogenous GaN bulk substrates4
Retention failure recovery technique for 3D TLC NAND flash memory via wordline (WL) interference4
Harnessing charge injection in Kelvin probe force microscopy for the evaluation of oxides4
Comparison of impact of channel length- and width-directional taper angle in nanosheet and forksheet FETs for 2 nm node and beyond4
Simulation process flow for the implementation of industry-standard FD-SOI quantum dot devices4
The study on influence factors of contact properties of metal-MoS2 interfaces4
Efficient circuit simulation of a memristive crossbar array with synaptic weight variability4
Switching characteristic of fabricated nonvolatile bipolar resistive switching memory (ReRAM) using PEDOT: PSS/GO4
Investigation of effects of lateral boundary conditions on current filament movements in Trench-Gate IGBTs4
A novel methodology for neural compact modeling based on knowledge transfer4
Performance of FDSOI double-gate dual-doped reconfigurable FETs4
Stress management in freestanding membranes obtained by ion implantation induced delamination4
Electron and spin transport in semiconductor and magnetoresistive devices4
Evidence of Transport Degradation in 22 nm FD-SOI Charge Trapping Transistors for Neural Network Applications4
Influence of gate-source/drain overlap on FeFETs4
High-quality remote plasma enhanced atomic layer deposition of aluminum oxide thin films for nanoelectronics applications4
Design methodology of a 28 nm FD-SOI capacitive feedback RF LNA based on the ACM model and look-up tables4
Pseudo-MOSFET transient behavior: Experiments, model, substrate and temperature effect4
Strong quantization of current-carrying electron states in δ-layer s4
Deep insights on new embedded resistance and gated diode on thin film silicon BIMOS device with and without external polysilicon resistance for advanced ESD protection in FD-SOI technology4
Editorial Board4
Reliable parameter extraction method applied to an enhanced GaN HEMT small-signal model4
Mobility degradation in 4H-SiC MOSFETs and interfacial formation of carbon clusters4
Enabling medium thick gate oxide devices in 22FDX® technology for switch and high-performance amplifier application4
A computational study of AlScN-based ferroelectric tunnel junction4
Novel experimental methodologies to reconcile large- and small-signal responses of Hafnium-based Ferroelectric Tunnel Junctions4
Impact of the W etching process on the resistive switching properties of TiN/Ti/HfO2/W memristors4
Drain-bias dependence of low-frequency Y22 signals for Fe-related GaN traps in GaN HEMTs with different Fe doping concentrations4
A composite model of memristors based on barrier and dopant drift mechanisms4
Novel Y-function based strategy for parameter extraction in S/D asymmetric architecture devices and low frequency noise characterization in GAA Si VNW pMOSFETs4
Silicon nitride resistance switching MIS cells doped with silicon atoms4
A dynamic current hysteresis model for IGZO-TFT4
Evidence of trapping and electrothermal effects in vertical junctionless nanowire transistors4
Pinning voltage model of vertical pinned photodiode for Dual-Pixel image sensor4
Improved inter-device variability in graphene liquid gate sensors by laser treatment4
Structural distortion in ferroelectric HfO2 – The factor that determines electric field-induced phase transformation4
Back-gate effects on DC performance and carrier transport in 22 nm FDSOI technology down to cryogenic temperatures4
Analysis of 1/f and G–R noise in Phosphorene FETs4
One-step variation included compact modeling with conditional variational autoencoder4
A well-conditioned surface potential equation for dynamically depleted SOI MOS devices accounting for the front-depletion/back-accumulation operation mode4
Device and circuit-level evaluation of a zero-cost transistor architecture developed via process optimization4
Impact of post metallization annealing (PMA) on the electrical properties of Ge nMOSFETs with ZrO2 dielectric4
A novel method used to prepare PN junction by plasmon generated under pulsed laser irradiation on silicon chip4
Editorial Board4
Temperature- and variability-aware compact modeling of ferroelectric FDSOI FET for memory and emerging applications4
Mechanism of polarization “Wake-Up” in ferroelectric Hafnia-Zirconia thin films4
Semi-classical transport in MoS2 and MoS2 transistors by a Monte Carlo approach4
Analog characteristics of n-type vertically stacked nanowires4
An efficient temperature dependent compact model for nanosheet FET for neuromorphic computing circuit4
Multi-state tunnel field effect transistor based on face tunneling with gate-source overlap4
Impact of work function metal stacks on the performance and reliability of multi-V RMG CMOS technology4
Si/Ge1x4
Novel crossbar array of silicon nitride resistive memories on SOI enables memristor rationed logic4
Unveiling the mechanism behind the negative capacitance effect in Hf0.5Zr0.5O2-Based ferroelectric gate stacks and introducing a Circuit-Compatible hybrid compact model for Leakage-Aware NCFETs4
Interconnect effects on thermal resistance of CMOS-SOI transistors in microwave power integrated circuits4
Opportunity for band alignment manipulation of perovskite oxide stacks by interfacial dipole layer formation4
Editorial Board4
High-densities of free holes in homoepitaxial n-GaN induced by fluorine-plasma ion implantation4
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