IEEE Transactions on Semiconductor Manufacturing

Papers
(The H4-Index of IEEE Transactions on Semiconductor Manufacturing is 19. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-05-01 to 2024-05-01.)
ArticleCitations
A Deep Convolutional Neural Network for Wafer Defect Identification on an Imbalanced Dataset in Semiconductor Manufacturing Processes113
Deformable Convolutional Networks for Efficient Mixed-Type Wafer Defect Pattern Recognition89
A Light-Weight Neural Network for Wafer Map Classification Based on Data Augmentation56
Deep Learning-Based Domain Adaptation Method for Fault Diagnosis in Semiconductor Manufacturing48
Active Learning of Convolutional Neural Network for Cost-Effective Wafer Map Pattern Classification42
Self-Supervised Representation Learning for Wafer Bin Map Defect Pattern Classification39
Semi-Supervised Multi-Label Learning for Classification of Wafer Bin Maps With Mixed-Type Defect Patterns38
SMT2020—A Semiconductor Manufacturing Testbed31
Memory-Augmented Convolutional Neural Networks With Triplet Loss for Imbalanced Wafer Defect Pattern Classification31
Variational Deep Clustering of Wafer Map Patterns29
Model-Free Adaptive Iterative Learning Control Method for the Czochralski Silicon Monocrystalline Batch Process29
Machine Learning-Based Detection Method for Wafer Test Induced Defects28
Data-Driven Framework for Tool Health Monitoring and Maintenance Strategy for Smart Manufacturing27
Applying Data Augmentation and Mask R-CNN-Based Instance Segmentation Method for Mixed-Type Wafer Maps Defect Patterns Classification24
Support Weighted Ensemble Model for Open Set Recognition of Wafer Map Defects23
Advanced Quality Control (AQC) of Silicon Wafer Specifications for Yield Enhancement for Smart Manufacturing23
Deep Learning Approach to Inverse Grain Pattern of Nanosized Metal Gate for Multichannel Gate-All-Around Silicon Nanosheet MOSFETs20
Perspectives on Black Silicon in Semiconductor Manufacturing: Experimental Comparison of Plasma Etching, MACE, and Fs-Laser Etching20
CNNs Combined With a Conditional GAN for Mura Defect Classification in TFT-LCDs20
Run-to-Run Control of Chemical Mechanical Polishing Process Based on Deep Reinforcement Learning19
Temporal Convolution-Based Long-Short Term Memory Network With Attention Mechanism for Remaining Useful Life Prediction19
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