Analog Integrated Circuits and Signal Processing

Papers
(The median citation count of Analog Integrated Circuits and Signal Processing is 1. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-06-01 to 2025-06-01.)
ArticleCitations
Dynamic energy consumption using multiobjective genetic algorithm based FFT for implantable cardiac pacemakers121
Design of energy efficient VCO for PLL application45
A 9T high-stable and Low-Energy Half-Select-Free SRAM Cell Design using TMDFETs39
Powerline interference reduction in ECG signals using variable notch filter designed via variational mode decomposition38
A 25Gb/s VCSEL driver with overshoot suppression in 0.13$$\mu$$m SiGe BiCMOS technology25
Cadmium sulfide deposition suited for photo pattern-based SAW device24
A 2.55-mW on-chip passive balun-LNA in 180-nm CMOS20
Novel architecture of four quadrant analog multiplier/divider circuit employing single CFOA18
Reducing delay and resistance of GNR based interconnect using insertion of buffers18
Design of DTMOS based third-order G$$_m$$-C filter for fast locking PLL18
Investigation of electrical parameters in extended source epitaxial layer DG-TFET including interface trap charges and temperatures17
New FTFNTA-based tunable charge-controlled memristance simulator and its mutation to floating flux-controlled memristor emulator17
A compact MIMO antenna design using Yagi-uda antenna inspired elements for 5G sub 6 GHz balanced band applications17
Comparison of the polarity reversal effect of memristor and memristor fuse in 2D cellular nonlinear network17
A simple chaotic circuit based on memristor and its analyzation of bifurcation16
A novel low-power, high-speed carry look ahead adder utilizing 11-T hybrid full adder module based 4:2 compressor unit for low-power applications15
Optimization of array system configuration using the smoothed-pad algorithm15
Systematic approach for IG-FinFET amplifier design using gm/Id method14
Phase noise reduction by resistor abutment in differential ring VCOs14
A 350 mV, 2 MHz, 16-kb SRAM with programmable wordline boosting in the 65 nm CMOS technology14
Optimal characterization of a microwave transistor using grey wolf algorithms14
A low-power differential readout interface for capacitive accelerometer-based SHM applications13
Reliable set of random number generation using Astable Multivibrator PUF13
Modeling and simulation of high flow medical CO2 insufflator using PID-P, PID-PQT, and MPC-PQT controllers13
Estimation of polarization diversity in CPW fed compact dual band dual sense antenna with horn slot structure: 5G and WLAN applications12
Compact inverted E-shaped open-circuited impedance matching stub bandpass filter for wireless applications12
Organic light emitting transistors: performance analysis and high performance device12
A low-noise high-precision analog front end system for biopotential signals recording application12
Hardware efficient arithmetic reconfigurable fully homomorphic encryption (ARFHE) accelerator of low power IoT based RISC-V processor12
Implementation of novel full-wave rectifier using second generation current conveyor (CCII)11
Very compact ultra-wideband slot antenna with integrated LTE band11
An ultra-low power hybrid 2nd order feed forward ΔΣ modulator design for implantable medical devices11
FinFET based ultra-low power 3T GC-eDRAM with very high retention time in sub-22 nm10
Novel nonlinearity minimized time-to-digital converters with digital calibration technique10
Auricular vagus nerve stimulator for closed-loop biofeedback-based operation10
Design analysis of advanced power amplifiers for 5G wireless applications: a survey10
A novel DC-DC switched capacitor based voltage multiplier9
Recycling piezoelectric switch-inductor charger9
An active inductor employed CML latch for high speed integrated circuits9
Design of a low voltage LDO powered by solar photovoltaic cell suitable for internet of things (IoT) devices8
Ultra-low power inductorless differential LNA for WSN application8
A predictive quantization based compressive sensing SAR ADC for ECG signal8
A double single-ended resonant inverter for low harmonic line frequency applications8
A 1-V 5-bit 0.5 GS/s time-based flash ADC in 0.18 µm CMOS technology8
A novel intelligent optimization-based maximum power point tracking control of photovoltaic system under partial shading conditions8
An efficient analysis of FitzHugh-Nagumo circuit model8
Switchable circular polarization in flower-shaped reconfigurable graphene-based THz microstrip patch antenna8
Reliable and ultra-low power approach for designing of logic circuits8
Power CoolMOS transistor electrothermal model for PSpice simulation7
A multimode CMOS PA with a single propagation path7
Insights of quad port MIMO antenna for 5G NR n77/n79 to X-bands with reconfigurable grounds using PIN diodes7
Design techniques for voltage-to-time converters with nonlinearity emphasis7
VDTA based Schmitt trigger using 32 nm CNTFET technology7
A 0.15-V, 44.73% PCE charge pump with CMOS differential ring-VCO for energy harvesting systems7
Two-stage class-AB OTA with improved specifications7
Area and delay optimized two step binary adder using carry substitution algorithm for FIR filter7
A tunable lossy grounded capacitance multiplier circuit based on VDTA for the low frequency operations7
Voltage-mode PID controller design employing canonical number of active and passive elements7
A Novel Reliability Assessment Scheme for Nano Resistive Random Access Memory (RRAM) Testing6
A multiple resonant microstrip patch heart shape antenna for satellite and Wi-Fi communication6
Schmitter trigger-based single-ended stable 7T SRAM cell6
An optimized LNA utilizing MGA for high performance 24 GHz radar applications6
SBCCI 2022 special issue6
Correction to: A novel compact fractal UWB antenna with dual band notched characteristics6
Robust vibration invariant SSHI rectifier circuit for piezoelectric device6
Secure and reliable communication using memristor-based chaotic circuit6
Realization of a pseudo-random number generator utilizing two coupled Izhikevich neurons on an FPGA platform6
Dual ultra-wideband high-efficiency rectenna for RF energy harvesting from UMTS and UNII bands6
The effect of ferrite bead on conducted emission in an automotive LED driver module with DC–DC converters6
Active block EX-CCII based electrical circuit for practical impedance data of OSCC6
An electronically tunable active-C based analog baseband filter for multi-standard applications5
Fast and ultra-low energy subthreshold level shifter using split-gate buffer for low-power digital VLSI systems5
Analysis and design of a GHz bandwidth adaptive bias circuit for an mmW Doherty amplifier5
A robust multi-bit soft-error immune SRAM cell for low-power applications5
Power factor correction in SMPS with optimized converter: a hybrid optimization approach5
Design of high-speed and 6-bit flash ADC module for non-contact vital sign signal processing in biomedical application5
Guest editorial5
Retrodirective wireless power transfer for short and long range applications5
Design and simulation of a new current mirror circuit with low power consumption and high performance and output impedance5
A mathematical technique determining the switching angles for PWM single phase inverter that also reduces high order-harmonics5
P/G Pin Position-Aware Voltage Island Floorplanning For IR Drop Security and avoidance in Flip Chip Designs of FIR Filter5
A power-efficient high GBW operational amplifier with its analog baseband IC implementation in 40-nm CMOS technology5
Performance analysis of DD-DPMZM based RoF link for emerging wireless networks5
$$\Delta \Sigma$$ Time-to-digital converter with current-steering vernier time integrator5
Novel high-gain narrowband antenna based on ENZ SIW structure and shorting pin5
Low input-resistance low-power transimpedance amplifier design for biomedical applications5
A translinear principle based low-power high-precision RMS-to-DC converter in CMOS technology5
Temperature dependence of analog/RF performance, linearity and harmonic distortion figures of merit in negative capacitance quad-FinFET5
Fully electronically tunable sinusoidal oscillator employing single VDTA and all grounded components5
High-speed and area efficient low-power dynamic parity generator and parity checker5
Integration of cascaded controllers for super-lift Luo converter with buck converter in solar photovoltaic and electric vehicle5
FPGA-enabled lossless ECG signal compression system using an integer adaptive compressor5
A 1 V 10-bit highly linear and monotonic digital-to-time converter with 0.066-LSB DNL utilizing a glitch-free dual reset method and switchable supply regulation scheme5
Design of high-performance quaternary half adder, full adder, and multiplier5
Design of a low-voltage and low-power, reconfigurable universal OTA-C filter5
Modelling of efficient nano-scale code converters using quantum dot cellular automata4
Realization of floating triple crossing memristor emulator with dual inflection point static characteristics4
A fast configurable AGC for front-end of digital hearing aids4
Exploration of low area-high speed by hybrid method of Radix-8 Booth encoding and Vedic multiplier4
Optimization of an SSHC-based full active rectifier for piezoelectric energy harvesting4
CNTFET based comparators: design, simulation and comparative analysis4
Thermal readout noise comparison of classical constant bias APS and switching bias APS used in CMOS image sensors4
A 13.56 MHz reconfigurable step-up switched capacitor converter for wireless power transfer system in implantable medical devices4
Low-power Relaxation Oscillator with Temperature-compensated Thyristor Decision Elements4
SBCCI’2021 Guest Editorial4
Phase locked loop-based clock synthesizer for reconfigurable analog-to-digital converters4
Optimized circular RFID tag antenna achieving extended detection range on metallic surfaces4
Dual iterative algorithm for hybrid beamforming in mmWave downlink massive multi-user MIMO systems4
Fused empirical mode decomposition with spectral flatness and adaptive filtering technique for denoising of ECG signals4
Memristive discrete chaotic neural network and its application in associative memory4
Analog circuit diagnosis based on support vector machine with parameter optimization by improved NKCGWO4
An on-chip partial self-healing calibration technique for 10-bit reused distributed current steering DAC4
Novel single-trit comparator circuits in ternary quantum-dot cellular automata4
Current mode instrumentation amplifier with CDCCC4
Single event transient (SET) for a novel step-truncated SELBOX FinFET device4
A 400 V Buck Converter integrated with Gate-Drivers and low-voltage Controller in a 25–600 V mixed-mode SiC CMOS technology4
AICSP NorCAS 2020 S.I. Foreword3
VVC decoder intra prediction using approximate storage: an error resilience evaluation3
An ultra-low-power CMOS smart temperature sensor based on frequency to digital conversion3
A novel low power high speed 14T-TSPC-DomDFF design and analysis in CMOS 16nm technology3
Fully-digital low-frequency lock-in amplifier for photoluminescence measurements3
A review of optical beam steering technologies in LiDAR photonic chips3
A novel wide-band, small size and high gain patch antenna array for 5G mm-wave applications using adaptive neuro-fuzzy inference system3
Monopole based flower-shaped 4-element MIMO antenna with high diversity performance for 4G: LTE, 5G: sub-6 GHz (n77/n78/n79), WiFi-5 and WiFi-6 bands applications3
Thin film based optically transparent circular monopole antenna for wideband applications3
Improved complete ensemble empirical mode decomposition with adaptive noise: quasi-oppositional Jaya hybrid algorithm for ECG denoising3
A new fraction phase based low energy frequency calibration architecture along with an ultra low power VCO design3
A wide-swing class-AB level-shifted bulk-driven folded flipped voltage follower cell with the low output resistance3
R-inmac: 10T SRAM based reconfigurable and efficient in-memory advance computation for edge devices3
Moving average filter for spur reduction in subsampling fractional PLLs3
Design of a low power high-speed dynamic latched comparator in 65- nm CMOS using peaking techniques3
Asynchronous time-based imager with DVS sharing3
BCSSA-VMD and ICOA-ELM based fault diagnosis method for analogue circuits3
Performance improvement in asynchronous binary search ADC using bootstrapped sample and hold circuit & 2-stage ladder network3
Using nano-scale QCA technology for designing fault-tolerant 2:1 multiplexer3
PAPR reduction and low power-consumption LDO in OFDM transceiver3
Low voltage second-order alpha function synapse3
TSPC-HNTL: True Single Phase Clock technique for High speed, Noise Tolerance, and Low power3
A novel design of an ultra-low-cost (m × n) multilayer RAM structure in quantum-dot cellular automata nanotechnology3
A low power arithmetic unit driven motion estimation and intra prediction accelerators with adaptive Golomb–Rice entropy encoder for H.264 encoders on FPGA3
Origins and minimization of intermodulation distortion in a pseudo-differential CMOS beamforming receiver3
Systematic design of stable high-order delta sigma modulators using genetic algorithm3
A novel reversible gate and optimised implementation of half adder, subtractor and 2-bit multiplier3
Coupled-line-based millimeter-wave CMOS spiral power dividers with tapered TLs3
Off-the shelf components-based inverse memristor emulator and its application in bandwidth extension of memristor emulator3
High-power buck chip design for vehicle far/near headlights3
A 60-dB dynamic range two-stage RMS power detector3
Power reduction using Unified techniques in Switch-tail Ring counter for sequential circuits3
Multiband antenna design with high gain and robust spherical coverage using a new 3D phased array structure for 5G mobile phone MM-wave applications3
Design of optimal FBMC subcarrier index modulation based on optimal prototype filter3
A switched-capacitor based track-and-hold amplifier suitable for PAM4 signaling in 45-nm CMOS3
A floating meminductor emulator using modified differential voltage current conveyor transconductance amplifier and its application3
An ultra low power analog integrated radial basis function classifier for smart IoT systems3
Wideband mimo antenna with reduced mutual coupling3
Mutual coupling reduction in tri-band MIMO antenna using spikes loaded asymmetric loop resonator for WLAN and Wi-MAX band3
SBCCI'2020 Guest Editorial3
Design and investigation of a novel variable reactance-based capacitive RF-MEMS switch with multifrequency operation for mmWave applications3
Load-dependent power transfer efficiency for on-chip coils3
Design of a pulsed eddy current testing power supply combining constant amplitude and clamp voltage control3
Security in sequence: NIST-adherent design of a hybrid random number generator with SRAM-based PUF3
Multiscroll chaotic attractors and multistability in a ring of three coupled inertial Hopfield neurons: theoretical analysis and circuit simulation3
A low-power and robust quaternary SRAM cell for nanoelectronics3
A new design of fault-tolerant digital comparator based on quantum-dot cellular automata3
FPGA-based implementation and verification of hybrid security algorithm for NoC architecture2
A circuit-level methodology for leakage power reduction of high-efficient compressors in 22-nm CMOS technology2
Digital multiplier-less implementation of a memcapacitor and its application in chaotic oscillator2
Design and analysis of a SET tolerant single-phase clocked double-tail dynamic comparator2
Widely tunable THz source based on constructive wave oscillator in a 130-nm SiGe BiCMOS2
A simplified over-temperature protection structure for smart power ICs2
An innovative interconnect structure with improved Elmore delay estimation model for deep submicron technology2
Dual mode, high frequency and power efficient grounded memristor based on OTA and DVCC2
VCSEL driver with synthesis of 25-Gb/s PAM-4 signal in 90-nm CMOS technology2
Germanium pocket based tunnel FET with underlap: design and simulation2
A High selectivity dual band-stop antenna with wide tuning characteristics for UWB applications2
Electronically tunable grounded inductance simulators and capacitor multipliers realization by using single Current Follower Transconductance Amplifier (CFTA)2
A low-power 10Gb/s CMOS clock and data recovery circuit with a quarter-rate phase detector2
Comprehensive analysis of LC cross-coupled oscillator with active and passive transconductance amplification structure2
A novel chaotic system with 2-D grid multi-scroll chaotic attractors through quasi-sine function2
Sharing SIMD execution units with decoupled offloader in asymmetric multicores2
Design and performance improvement of low power SRAM using deep submicron technology2
An 80–84.8 GHz PLL with auto-tracking Miller divider for FMCW applications2
Performance-driven OFET design for advanced hydrogen gas sensing applications2
High-speed and energy-efficient subthreshold level converter for wider voltage conversion2
A TIQ based 6-bit 8 Gs/s time interleaved ADC design2
Correlated multiple sampling technique - a discrete Fourier Transform analysis aimed for CMOS image sensors2
A design approach for class-AB operational amplifier using the gm/ID methodology2
A modular programmable and linear charge pump with low current mismatch2
A current limiter for satellite power protection2
Signal dynamic range expansion and power supply voltage reduction for an exponentiation conversion IC2
Tuneable RF MEMS capacitors based on electrostatically induced torsion2
Improved performance of two-and three-stage amplifiers with zero-and pole-block creator2
A 10 W 93.7% peak efficiency load balanced single inductor double output (SIDO) hysteretic buck converter with 0.0063 mV/mA low cross regulation2
Low voltage low power FGMOS based current mirror with improved performance2
A hybrid approach with MPPT controller for weed cutting based on solar powered lawnmower with minimal intervention of human involvement adopting IoT technology2
Glitch free transmission gate based linear and nonlinear PFD architectures for fast and low reference-spur PLL2
A 2.28mW 100 MS/s 10-bit ping-pong configuration SAR-assisted pipeline ADC2
Automatic tool for test set generation and DfT assessment in analog circuits2
FPGA implementation of intelligent battery management unit (i-BMU) based on dynamic power distribution technique for electric vehicles2
Bootstrapping techniques for energy-efficient successive approximation ADC2
Dual-loop integer PLL for phase noise reduction2
Guest editorial: Introduction to the special issue on selected papers from the ICM’2021 conference2
Active and passive rectification methods for US-powered IMDs2
New CMOS linear voltage-controlled floating positive and negative resistances2
The design of low voltage/power current-mode sinh-domain filter for biomedical applications2
A new design of an efficient configurable circuit based on quantum-dot technology for digital image processing2
Reducing impulsive noise in active noise control systems using FxLMS algorithm based on soft thresholding techniques2
Hardware optimized digital down converter for multi-standard radio receiver2
SIFO–VM/TIM universal biquad filter using single DVCCTA with fully CMOS realization2
Blind 2-microphone acoustic noise reduction algorithms using efficient variable step-size adapted by minimizing the intercorrelation function2
Seamless connectivity: universal asynchronous receiver and transmitter for implantable medical devices2
Compact fractal based UWB mimo antenna with dual band dispensation2
Resources using multi-input DC-DC converter topology for optimal utilization of a novel step-up interconnected enhanced technique renewable energy2
An offset calibration scheme for on-chip thermal profiling with differential temperature sensors2
A deterministic digital calibration technique for pipelined ADCs using a non-nested algorithm2
A 512-ns conversion time 13-bit parallel two-step single-slope ADC for hundreds of mpxiel CMOS image sensors2
Modeling and simulation of low power single event upset-resilient SRAM cell2
SEC-DED-Hsiao code protection for SRAM memories used in space applications2
A 12.5 Gb/s 1.38 mW all-inverter-based optical receiver with multi-stage feedback TIA and continuous-time linear equalizer2
An ultra-low-power near rail-to-rail pseudo-differential subthreshold gate-driven OTA with improved small and large signal performances2
Chronos-v: a many-core high-level model with support for management techniques2
CCII-based simulated floating inductor and floating capacitance multiplier2
Lightweight implementation of AES for resource constrained environment2
A 6 bit and 500 MS/s hybrid ADC with energy efficient CDAC switching scheme2
Area-efficient multi-channel active matrix micro-LED driver chip design2
A hybrid ensemble voting-based residual attention network for motor imagery EEG Classification2
A new nano-scale authentication architecture for improving the security of human-computer interaction systems based on quantum computing2
Design of 1.2 V CMOS flipped voltage follower based output-capacitor-less low dropout regulator with improved voltage buffer for impedance attenuation2
Systems classification of air pollutants using Adam optimized CNN with XGBoost feature selection2
Design of a low power and robust VLSI power line interference canceler with optimized arithmetic operators2
A new dual memristor hyperchaotic system: dynamic properties, electronic circuit, and image encryption2
Design procedure for noise and power optimisation of CMOS folded-cascode operational transconductance amplifier based on the inversion coefficient2
Integration of metamaterials for quintuple band-notched ultra-wideband antennas1
Application of intermediate CMOS layer-based defected ground structure to design a dual-band on-chip antenna with improved gain1
Grey wolf optimization (GWO) based efficient partitioning algorithm VLSI circuits for reducing the interconnections1
DNA bases detection via MoS2 field effect transistor with a nanopore: first-principles modeling1
High-performance radiation hardened NMOS only Schmitt Trigger based latch designs1
A 223-$$\mu W$$ single-to-differential RF mixer with 8.6dBm IIP3 using current-bleeding and body-effect for sub-6 GHz 5G applications1
A multiplier-less meminductor emulator with experimental results and neuromorphic application1
Crescent shaped novel 4 × 4 port MIMO design with defected ground structure for multiband sub 6 GHz applications1
Compact and asymmetric fed modified hexagonal shaped multiple-input multiple-output (MIMO) antenna for 5G sub: 6 GHz (N77/N78 & N79) and WLAN applications1
Extended Noise shaping of Cross-Coupled Sigma-Delta Modulator using optimized coefficients1
Dynamic wireless power transfer in the presence of reflecting walls1
Adaptive self-threshold strategy of high speed comparator-based relaxation oscillator using 0.18-μm low-power CMOS design1
Quad-port octagon slotted high isolation MIMO antenna for GSM1800 to X-band wireless applications1
Implementation of a memristor-based 4D chaotic oscillator and its nonlinear control1
A novel microstrip antenna loaded with EBG and ELC for bandwidth enhancement1
VDDDA based low power filter using 32 nm CNTFET technology1
ECRAAL: a high-performance multiplier design by efficient charge recovery asynchronous adiabatic logic1
NANO-studio, the design environment of filter banks implemented in standard CMOS technology1
Low-cost defect simulation framework for analog and mixed signal (AMS) circuits with enhanced time-efficiency1
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