Analog Integrated Circuits and Signal Processing

Papers
(The TQCC of Analog Integrated Circuits and Signal Processing is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-04-01 to 2025-04-01.)
ArticleCitations
Parametric analysis on DC and analog/linearity response of multi-channel FinFET (Mch-FinFET) with spacer engineering92
Reducing delay and resistance of GNR based interconnect using insertion of buffers41
Power factor correction in SMPS with optimized converter: a hybrid optimization approach32
Hardware optimized digital down converter for multi-standard radio receiver24
Design of high-performance quaternary half adder, full adder, and multiplier23
A compact MIMO antenna design using Yagi-uda antenna inspired elements for 5G sub 6 GHz balanced band applications23
A new dual memristor hyperchaotic system: dynamic properties, electronic circuit, and image encryption19
Battery voltage transfer method for multi-cells Li-ion battery pack protection chips18
Fpga implementation of an efficient phase shift beamformer for narrow band sub-GHz applications18
Deep and shallow fast embedded capsule networks: going faster with capsules17
Guest editorial17
Blind 2-microphone acoustic noise reduction algorithms using efficient variable step-size adapted by minimizing the intercorrelation function16
SIFO–VM/TIM universal biquad filter using single DVCCTA with fully CMOS realization16
Design of a tunable delay line with on-chip calibration to generate process-invariant PWM signal for in-memory computing16
A novel analog circuit fault diagnosis method based on multi-channel 1D-resnet and wavelet packet transform15
Design of high-speed and 6-bit flash ADC module for non-contact vital sign signal processing in biomedical application15
FPGA-based implementation and verification of hybrid security algorithm for NoC architecture15
A novel read decoupled 8T1M nvSRAM cell with improved read/write margin15
Design of energy efficient VCO for PLL application14
A programmable gain amplifier based on a two-level CNTFET op amp with optimized trans-conductance to drain current ratio14
Design procedure for noise and power optimisation of CMOS folded-cascode operational transconductance amplifier based on the inversion coefficient14
An improved 1.8 V 4.05 ppm/°C curvature corrected bandgap reference circuit14
Energy efficient enhanced all pass transformation fostered variable digital filter design based on approximate adder and approximate multiplier for eradicating sensor nodes noise13
$$\Delta \Sigma$$ Time-to-digital converter with current-steering vernier time integrator13
A Novel Low Power 4:2 Compressor using FinFET Devices13
Hardware and coding efficiency assessment of 3D-HEVC DIS tool using alternative similarity criteria12
Dynamic energy consumption using multiobjective genetic algorithm based FFT for implantable cardiac pacemakers12
A low-power 10Gb/s CMOS clock and data recovery circuit with a quarter-rate phase detector12
Design and implementation of compact ultra-wideband vivaldi antenna with directors for microwave-based imaging of breast cancer12
A compact adderless feed-forward incremental $$\varDelta \varSigma $$ with multiple global references for CMOS image sensors11
Grounded inductance simulator realization with single VDDDA11
MEMS tunable filters based on DGS and waveguide structures: a literature review11
A novel memristor-based method to compute eigenpairs11
Bootstrapping techniques for energy-efficient successive approximation ADC11
A power-efficient high GBW operational amplifier with its analog baseband IC implementation in 40-nm CMOS technology11
A 0.25–1.0 V fully synthesizable three-stage dynamic voltage comparator based XOR&XNOR&NAND&NOR logic10
A 12-bit 10-MS/s SAR ADC with a weighted sampling time technique applied to C-DAC10
Linearization of microwave power amplifier using multi-port receiver with machine learning techniques in X-band10
An optimization of a non-volatile latch using memristors for sequential circuit applications10
Novel architecture of four quadrant analog multiplier/divider circuit employing single CFOA10
Low input-resistance low-power transimpedance amplifier design for biomedical applications9
Sleepy keeper style based Low Power VLSI Architecture of a Viterbi Decoder applying for the Wireless LAN Operation sustainability9
Correlated multiple sampling technique - a discrete Fourier Transform analysis aimed for CMOS image sensors9
A mixed-mode on-chip automatic frequency tuning technique for biopotential amplifiers9
A picowatt, 3.88 ppm/°C, 0.011%/V subthreshold CMOS voltage reference biased by GSCC current source9
A three-stage OTA with transistor impendence modulation compensation for ultra-large load applications9
A 2.55-mW on-chip passive balun-LNA in 180-nm CMOS8
A general purpose, low power, analog integrated image edge detector, based on a current-mode Gaussian function circuit8
Exact design for the settling time of two-stage Miller compensated operational amplifiers8
Analysis of strong-arm comparator with auxiliary pair for offset calibration8
Dual polarized patch antenna array with improved isolation and gain for full-duplex wireless communications8
Design of a low power and robust VLSI power line interference canceler with optimized arithmetic operators8
A TIQ based 6-bit 8 Gs/s time interleaved ADC design8
Spectral efficiency of hybrid precoding and combining design for mm-Wave multi-user massive MIMO systems7
Analog circuit architecture for max and min pooling methods on image7
Cadmium sulfide deposition suited for photo pattern-based SAW device7
FPGA design and implementation of TRNG architecture using ADPLL based on fir as loop filter7
An 18–28 GHz dual-mode down-converter IC for 5G applications7
A 1 V 10-bit highly linear and monotonic digital-to-time converter with 0.066-LSB DNL utilizing a glitch-free dual reset method and switchable supply regulation scheme7
Design of DTMOS based third-order G$$_m$$-C filter for fast locking PLL7
A 9T high-stable and Low-Energy Half-Select-Free SRAM Cell Design using TMDFETs7
Active and passive sensitivity analysis for the second-order active RC filter families using operational amplifier: a review7
Tunable bandpass filter using double resistive feedback floating active inductor for 5 GHz wireless LAN Applications7
Correction: A floating memristor emulator for analog and digital applications with experimental results6
Recursive adaptive filtering algorithms for sparse channel identification and acoustic noise reduction6
Performance analysis of DD-DPMZM based RoF link for emerging wireless networks6
Medical images transmission over Wireless Multimedia Sensor Networks with high data rate6
Memristive discrete chaotic neural network and its application in associative memory6
Finding all DC operating points of nonlinear circuits using interval linearization based method6
Analysis and design of sub-6 beam steerable antenna array using meta-material loaded vivaldi elements6
Powerline interference reduction in ECG signals using variable notch filter designed via variational mode decomposition6
A design approach for class-AB operational amplifier using the gm/ID methodology6
An ultrawideband balanced antipodal vivaldi antenna for medical imaging applications with performance analysis for different surface finish materials6
Rail-to-rail input/output bulk driven class AB operational amplifier with improved composite transistors6
Memcapacitor emulator using VDTA-memristor6
A fast transient response low-dropout regulator with all-NPN push–pull buffer in 0.6-μm bipolar process6
Chip implementation of low-power high-efficient buck converter for battery-powered IOT applications6
A 25Gb/s VCSEL driver with overshoot suppression in 0.13$$\mu$$m SiGe BiCMOS technology6
Electronically tunable high frequency single output OTA and DVCC based meminductor6
Privacy preserved two factor authentication system using spread spectrum watermarking of fingerprint and crypto code6
QCA based programmable logic block for implementation of digital circuits in multilayer framework6
Low-power Relaxation Oscillator with Temperature-compensated Thyristor Decision Elements6
3–5 GHz FSK-OOK ultra wideband transmitter based on memristive ring oscillator5
Efficient hardware implementations of Lopez–Dahab projective co-ordinate based scalar multiplication of ECC5
Compact inverted E-shaped open-circuited impedance matching stub bandpass filter for wireless applications5
Correction to: Range resolution enhancement technique for dual demodulator continuous-time frequency modulation processing5
Widely tunable THz source based on constructive wave oscillator in a 130-nm SiGe BiCMOS5
High isolation (300–3000) GHz MIMO antenna5
Resources using multi-input DC-DC converter topology for optimal utilization of a novel step-up interconnected enhanced technique renewable energy5
Exploration of low area-high speed by hybrid method of Radix-8 Booth encoding and Vedic multiplier5
A comprehensive review: ultra-low power all-digital phase-locked loop RF transceivers for biomedical monitoring applications5
Modelling of efficient nano-scale code converters using quantum dot cellular automata5
Thermally-aware circuit model and performance analysis of MLGNR for nano-interconnect application5
ECRAAL: a high-performance multiplier design by efficient charge recovery asynchronous adiabatic logic5
SBCCI’2021 Guest Editorial5
Design and analysis of nonagonal patch unite with rectangular shaped 4-element UWB-MIMO antenna for portable wireless device applications5
3-D graphics of digital multiplier with Kogge-Stone adder5
Compact and asymmetric fed modified hexagonal shaped multiple-input multiple-output (MIMO) antenna for 5G sub: 6 GHz (N77/N78 & N79) and WLAN applications5
Germanium pocket based tunnel FET with underlap: design and simulation5
Dual iterative algorithm for hybrid beamforming in mmWave downlink massive multi-user MIMO systems5
Single event transient (SET) for a novel step-truncated SELBOX FinFET device5
A novel low-power, high-speed carry look ahead adder utilizing 11-T hybrid full adder module based 4:2 compressor unit for low-power applications5
A simple chaotic circuit based on memristor and its analyzation of bifurcation4
Analog circuit diagnosis based on support vector machine with parameter optimization by improved NKCGWO4
Design and implementation of high-performance 20-T hybrid full adder circuit4
Realization of floating triple crossing memristor emulator with dual inflection point static characteristics4
Design of a delay locked loop with low power and high operating frequency range characteristics in 180-nm CMOS process4
Current mode instrumentation amplifier with CDCCC4
Low-voltage dynamic comparator using positive feedback bulk effect on a floating inverter amplifier4
A fast configurable AGC for front-end of digital hearing aids4
Phase noise reduction by resistor abutment in differential ring VCOs4
Crescent shaped novel 4 × 4 port MIMO design with defected ground structure for multiband sub 6 GHz applications4
Low leakage 10T SRAM cell with improved data stability in deep sub-micron technologies4
A novel microstrip antenna loaded with EBG and ELC for bandwidth enhancement4
Optimization of array system configuration using the smoothed-pad algorithm4
Hard-disk drive read-channel design trade-offs for areal densities beyond 2 Tb/in24
A low-power differential readout interface for capacitive accelerometer-based SHM applications4
A simple anti-parallel diodes based chaotic jerk circuit with arcsinh function: theoretical analysis and experimental verification4
Optimization of an SSHC-based full active rectifier for piezoelectric energy harvesting4
A low-noise high-precision analog front end system for biopotential signals recording application4
Design and analysis of a very low imbalance broadband active balun4
Model and design of an efficient controller for microgrid connected HRES system with integrated DC–DC converters: ATLA-GBDT approach4
Concentric semi-circular ring loaded multi-band antenna for wireless applications4
OptiPlace: optimized placement solution for mixed-size designs4
Signal dynamic range expansion and power supply voltage reduction for an exponentiation conversion IC4
A deterministic digital calibration technique for pipelined ADCs using a non-nested algorithm4
Realization of inverse filters using second generation voltage conveyor (VCII)4
A power-aware task scheduler for energy harvesting-based wearable biomedical systems using snake optimizer4
Supplementary MOSFET-C transimpedance mode filters for wireless systems4
Design and applications of adjustable 2D digital filters with elliptical and circular symmetry4
Design and analysis of noninverting single-spiral CMOS Wilkinson power dividers and their quadrature couplers and baluns3
A 350 mV, 2 MHz, 16-kb SRAM with programmable wordline boosting in the 65 nm CMOS technology3
Flower shaped frequency coded chipless RFID tag for low cost item tracking3
A 13.56 MHz reconfigurable step-up switched capacitor converter for wireless power transfer system in implantable medical devices3
Power controlled system for self-sustained RF energy harvesting sensors3
Frequency reconfigurable antenna array modelling based on MoM-GEC method for RFID, WiMax and WLAN applications3
A novel wide-band, small size and high gain patch antenna array for 5G mm-wave applications using adaptive neuro-fuzzy inference system3
Optimal characterization of a microwave transistor using grey wolf algorithms3
CNTFET based inductance simulator circuits employing single CFOA and its filter applications3
Application of intermediate CMOS layer-based defected ground structure to design a dual-band on-chip antenna with improved gain3
Adaptive double recycling folded cascode amplifier3
Design of a high precision CMOS programmable gain and data rate delta sigma ADC3
Phase locked loop-based clock synthesizer for reconfigurable analog-to-digital converters3
An optimization approach control of EV solar charging system with step-up DC–DC converter3
A multi-objective optimization of sensitivity and bandwidth of a 3-D MEMS bionic vector hydrophone3
Rail-to-rail split-output SET tolerant digital gates3
Digitally controlled PWM buck converter employing counter and VCOs3
Design and analysis of a SET tolerant single-phase clocked double-tail dynamic comparator3
Chronos-v: a many-core high-level model with support for management techniques3
A new digital background calibration technique for pipeline analog to digital converters using decision points of the voltage transfer characteristics3
A 2.28mW 100 MS/s 10-bit ping-pong configuration SAR-assisted pipeline ADC3
Wideband mimo antenna with reduced mutual coupling3
Compact fractal based UWB mimo antenna with dual band dispensation3
An innovative interconnect structure with improved Elmore delay estimation model for deep submicron technology3
Correction: A 9T high-stable and Low-Energy Half-Select-Free SRAM Cell Design using TMDFETs3
An on-chip partial self-healing calibration technique for 10-bit reused distributed current steering DAC3
A circuit-level methodology for leakage power reduction of high-efficient compressors in 22-nm CMOS technology3
A current limiter for satellite power protection3
Systematic approach for IG-FinFET amplifier design using gm/Id method3
VDDDA based low power filter using 32 nm CNTFET technology3
28 GHz coupled-line-based CMOS power combiners and phase shifter, and power amplifiers with the power combiners3
Universal memelement emulator using only off-the-shelf components3
Extended Noise shaping of Cross-Coupled Sigma-Delta Modulator using optimized coefficients3
Sharing SIMD execution units with decoupled offloader in asymmetric multicores3
CNTFET based comparators: design, simulation and comparative analysis3
Reliable set of random number generation using Astable Multivibrator PUF3
Evaluating FPGA-based denoising techniques for improved signal quality in electrocardiograms3
Novel single-trit comparator circuits in ternary quantum-dot cellular automata3
Modeling and simulation of high flow medical CO2 insufflator using PID-P, PID-PQT, and MPC-PQT controllers3
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