OOIR: Observatory of International Research

Papers

(The H4-Index of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is 28. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-04-01 to 2025-04-01.)

Article	Citations
Call for Applications and Nominations Search for the Editor-in-Chief of IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS	99
IEEE Transactions on Very Large Scale Integration (VLSI) Systems Publication Information	68
IEEE Transactions on Very Large Scale Integration (VLSI) Systems Society Information	46
M²-ViT: Accelerating Hybrid Vision Transformers With Two-Level Mixed Quantization	46
Hardware–Algorithm Codesigned Low-Latency and Resource-Efficient OMP Accelerator for DOA Estimation on FPGA	42
Bandwidth-Latency-Thermal Co-Optimization of Interconnect-Dominated Many-Core 3D-IC	41
Research on Hardware Acceleration of Traffic Sign Recognition Based on Spiking Neural Network and FPGA Platform	41
A Novel Prediction-Based Two-Tiered ECC for Mitigating SWD Errors in HBM	39
IEEE Transactions on Very Large Scale Integration (VLSI) Systems Publication Information	37
An Efficient and Precision-Reconfigurable Digital CIM Macro for DNN Accelerators	36
Edge PoolFormer: Modeling and Training of PoolFormer Network on RRAM Crossbar for Edge-AI Applications	36
A Methodology for Datapath Energy Prediction and Optimization in Near Threshold Voltage Regime	35
Analysis and Design of Ripple-Free Bandgap Reference Circuit With p-n-p Bipolars	34
All-Rounder: A Flexible AI Accelerator With Diverse Data Format Support and Morphable Structure for Multi-DNN Processing	33
A Programmable and Reconfigurable CMOS Analog Hopfield Network for NP-Hard Problems	33
High-Performance Instruction-Set Hardware Accelerator for Ring-Binary-LWE-Based Lightweight PQC	33
GNN-Based Hardware Trojan Detection at Register Transfer Level Leveraging Multiple-Category Features	33
TechRxiv: Share Your Preprint Research with the World!	32
A 1 mW–10 W, Over 86.4% Efficiency Tri-Mode Buck Converter With Ripple-Based Control for Mobile Applications	32
Table of contents	31
A Ku-Band Eight-Element Phased-Array Transmitter With Built-in Self-Test Capability in 180-nm CMOS Technology	30
RVSLH: Acceleration of Postquantum Standard SLH-DSA With Customized RISC-V Processor	30
IEEE Transactions on Very Large Scale Integration (VLSI) Systems	30
IEEE Transactions on Very Large Scale Integration (VLSI) Systems Publication Information	29
Table of Contents	29

FPGA Implementation of Staged Projection Refining Multiple Orthogonal Matching Pursuit Algorithm for Compressed Sensing	28
A Two-Stage CMOS Amplifier With High Degree of Stability for All Capacitive Loads	28
A Capacitorless Flipped-Voltage-Follower-Based Low-Dropout Regulator Incorporating Adaptive-Compensation Buffer	28