ACM Transactions on Embedded Computing Systems

Article	Citations
RiSA: A Reinforced Systolic Array for Depthwise Convolutions and Embedded Tensor Reshaping	71
Excluding Parallel Execution to Improve Global Fixed Priority Response Time Analysis	68
Holistic Resource Allocation Under Federated Scheduling for Parallel Real-time Tasks	52
Introduction to the Special Issue on Memory and Storage Systems for Embedded and IoT Applications	51
Model-based Toolchain for Core Flight System (cFS) Embedded Systems	48
REC: REtime Convolutional Layers to Fully Exploit Harvested Energy for ReRAM-based CNN Accelerators	46
A Unified Programmable Edge Matrix Processor for Deep Neural Networks and Matrix Algebra	44
Thermal-aware Adaptive Platform Management for Heterogeneous Embedded Systems	43
A Novel Lattice-Based Fault Injection Attack Targeting the Nonce in the SM2 Digital Signature Algorithm	42
Hardware Acceleration for Embedded Keyword Spotting: Tutorial and Survey	42
SideDRAM: Integrating SoftSIMD Datapaths near DRAM Banks for Energy-Efficient Variable Precision Computation	39
FLASH: Deadline-Aware Flexible LLC Arbitration and Scheduling for Hardware Accelerators	39
Formal Synthesis of Neural Barrier Certificates for Continuous Systems via Counterexample Guided Learning	39
A Comprehensive Survey on Deep Learning-based Predictive Maintenance	37
Contention Grading and Adaptive Model Selection for Machine Vision in Embedded Systems	36
More Is Less: Model Augmentation for Intermittent Deep Inference	35
ViT4Mal: Lightweight Vision Transformer for Malware Detection on Edge Devices	35
Distributed Task Offloading and Resource Purchasing in NOMA-Enabled Mobile Edge Computing: Hierarchical Game Theoretical Approaches	35
A Self-Sustained CPS Design for Reliable Wildfire Monitoring	32
PolyARBerNN: A Neural Network Guided Solver and Optimizer for Bounded Polynomial Inequalities	30
Neural Abstraction-Based Controller Synthesis and Deployment	29
WasmAndroid: A Cross-Platform Runtime for Native Programming Languages on Android	29
Declarative Power Sequencing	29
IoV-Fog-Assisted Framework for Accident Detection and Classification	28
Graph Transformations for Memory Peak Minimization by Scheduling	27

TAFP-ViT: A Transformer Accelerator via QKV Computational Fusion and Adaptive Pruning for Vision Transformer	26
VoxDepth : Rectification of Depth Images on Edge Devices	26
Large or Small: Harnessing the Erase Duality of Emerging Bit-Alterable NAND Flash to Suppress Tail Latency	24
Kryptonite: Worst-Case Program Interference Estimation on Multi-Core Embedded Systems	23
Scalable Binary Neural Network Applications in Oblivious Inference	22
An Efficient and Flexible Stochastic CGRA Mapping Approach	22
Formally Verified Loop-Invariant Code Motion and Assorted Optimizations	22
Enhancing the Energy Efficiency and Robustness of tinyML Computer Vision Using Coarsely-quantized Log-gradient Input Images	21
Securing Pacemakers Using Runtime Monitors over Physiological Signals	21
Formal Modeling of Hybrid System Based on Semi-continuous Colored Petri Net: A Case Study of Adaptive Cruise Control System	20
Automatic Generation of Resource and Accuracy Configurable Processing Elements	20
Automatic Generation of Fast and Accurate Performance Models for Deep Neural Network Accelerators	20
IoT-Fog-Cloud Centric Earthquake Monitoring and Prediction	20
Mining Hyperproperties using Temporal Logics	20
Reg-Tune: A Regression-Focused Fine-Tuning Approach for Profiling Low Energy Consumption and Latency	20
Guaranteeing Timely Response to Changes of Monitored Objects by Assigning Deadlines and Periods to Tasks	19
Regime Inference for Sound Floating-Point Optimizations	19
Cross-Layer Adaptation with Safety-Assured Proactive Task Job Skipping	19
DyCo: Dynamic, Contextualized AI Models	18
Star-Set Based Efficient Reachable Set Computation of Anytime Sensing-Based Neural Network-Controlled Dynamical Systems	18
Performance Modeling of Computer Vision-based CNN on Edge GPUs	18
Towards Building Verifiable CPS using Lingua Franca	18
FSIMR: File-system-aware Data Management for Interlaced Magnetic Recording	17
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks	17
DynHaMo: Dynamic Hardware-Based Monitoring Dedicated to Attacks Detection	17
Software-Managed Read and Write Wear-Leveling for Non-Volatile Main Memory	16
CARIn: Constraint-Aware and Responsive Inference on Heterogeneous Devices for Single- and Multi-DNN Workloads	16
EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator	16
Unlocking the Full Potential of Dual-Interface SSDs: A Comprehensive Hardware and Software Perspective	16
Evolution Function Based Reach-Avoid Verification for Time-varying Systems with Disturbances	16
Federated Self-training for Semi-supervised Audio Recognition	15
Supervisory Control for Dynamic Feature Configuration in Product Lines	15
A Write-Related and Read-Related DRAM Allocation Strategy Inside Solid-State Drives (SSDs)	15
BASS: Safe Deep Tissue Optical Sensing for Wearable Embedded Systems	15
DTRL: Decision Tree-based Multi-Objective Reinforcement Learning for Runtime Task Scheduling in Domain-Specific System-on-Chips	14
Middleware for Distributed Applications in a LoRa Mesh Network	14
RPFF-PA : Reliable and Parallel Fault-tolerant Framework for Path Latency Reduction Deployed in Register Arrays	14
Rtkaller: State-aware Task Generation for RTOS Fuzzing	14
Criticality-aware Monitoring and Orchestration for Containerized Industry 4.0 Environments	14
Improving Worst-case TSN Communication Times of Large Sensor Data Samples by Exploiting Synchronization	14
Reaction Latency Analysis of Message Synchronization in Edge-assisted Autonomous Driving	14
Multi-Compression Scale DNN Inference Acceleration based on Cloud-Edge-End Collaboration	14
PEak: A Single Source of Truth for Hardware Design and Verification	14
FC-GPU: Feedback Control GPU Scheduling for Real-time Embedded Systems	14
CIMFlow: Modelling Dataflow in Cross-Layer Compute-in-Memory Deep Learning Accelerators	13
SecuPilot: A Security Coprocessor-Integrated Platform for Autonomous UAV Security	13
DOCTOR: A Multi-Disease Detection Continual Learning Framework Based on Wearable Medical Sensors	13
Early DSE and Automatic Generation of Coarse-grained Merged Accelerators	13
Latency-Aware Pruning and Quantization of Self-Supervised Speech Transformers for Edge Devices	13
Optimus: An Operator Fusion Framework for Deep Neural Networks	13

XimSwap: Many-to-Many Face Swapping for TinyML	12
Elements of Timed Pattern Matching	12
Cache Abstraction for Data Race Detection in Heterogeneous Systems with Non-coherent Accelerators	12
Coarse-Grained Task Parallelization by Dynamic Profiling for Heterogeneous SoC-Based Embedded System	12
A Robust and Energy Efficient Hyperdimensional Computing System for Voltage-scaled Circuits	12
ZIP-CNN: Design Space Exploration for CNN Implementation within a MCU	12
A Hierarchical Classification Method for High-accuracy Instruction Disassembly with Near-field EM Measurements	11
Telomere: Real-Time NAND Flash Storage	11
WARM-tree: Making Quadtrees Write-efficient and Space-economic on Persistent Memories	11
Introduction to the Special Issue on Accelerating AI on the Edge – Part 1	11
Analog In-memory Circuit Design of Polynomial Multiplication for Lattice Cipher Acceleration Application	11
Leveraging Computational Storage for Power-Efficient Distributed Data Analytics	11
A Highly Hardware Efficient ML-KEM Accelerator with Optimised Architectural Layers	11
Efficient and Robust Edge AI: Software, Hardware, and the Co-design	10
TAB: Unified and Optimized Ternary, Binary, and Mixed-precision Neural Network Inference on the Edge	10
A Predictable QoS-aware Memory Request Scheduler for Soft Real-time Systems	10
DynO: Dynamic Onloading of Deep Neural Networks from Cloud to Device	10
AdaTest: Reinforcement Learning and Adaptive Sampling for On-chip Hardware Trojan Detection	10
Faster Implementation of Ideal Lattice-Based Cryptography Using AVX512	10
A Load-Balanced Collaborative Repair Algorithm for Single-Disk Failures in Erasure Coded Storage Systems	10
CABARRE: Request Response Arbitration for Shared Cache Management	10
An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory	10
Store-n-Learn: Classification and Clustering with Hyperdimensional Computing across Flash Hierarchy	10
Fast Loosely-Timed Deep Neural Network Models with Accurate Memory Contention	10
HDLRuby: A Ruby Extension for Hardware Description and Its Translation to Synthesizable Verilog HDL	10
Virtualizing a Post-Moore’s Law Analog Mesh Processor: The Case of a Photonic PDE Accelerator	9
Wireless Perceptual Space Modeling Method for Cross-Domain Human Activity Recognition	9
TreeHouse: An MLIR-based Compilation Flow for Real-Time Tree-based Inference	9
Domain-Specific Architectures: Research Problems and Promising Approaches	9
Introduction to the Special Issue on Domain-Specific System-on-Chip Architectures and Run-Time Management Techniques	9
RTPL: A Real-Time Communication Protocol for LoRa Network	9
Probabilistic Reaction Time Analysis	9
Application-Level Evaluation of IEEE 802.1AS Synchronized Time and Linux for Distributed Real-Time Systems	9
Verifying Stochastic Hybrid Systems with Temporal Logic Specifications via Model Reduction	9
Florets for Chiplets: Data Flow-aware High-Performance and Energy-efficient Network-on-Interposer for CNN Inference Tasks	9
Dataflow Driven Partitioning of Machine Learning Applications for Optimal Energy Use in Batteryless Systems	9
An Efficient CNN Accelerator for Low-Cost Edge Systems	9
Tutorial: A Novel Runtime Environment for Accelerator-Rich Heterogeneous Architectures	9
Toward Optimal Softcore Carry-aware Approximate Multipliers on Xilinx FPGAs	9
Hierarchical Resource Orchestration Framework for Real-time Containers	9
VADF: V ersatile A pproximate D ata F ormats for Energy-Efficient Computing	9
RegKey: A Register-based Implementation of ECC Signature Algorithms Against One-shot Memory Disclosure	9
Precise Correlation Extraction for IoT Fault Detection With Concurrent Activities	8
An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA	8
Rectifying Skewed Kernel Page Reclamation in Mobile Devices for Improving User-Perceivable Latency	8
Power Side-channel Attack Resistant Circuit Designs of ARX Ciphers Using High-level Synthesis	8
Challenges and Opportunities of Security-Aware EDA	8
????????????????????????: Utilizing Hyperdimensional Computing for a More Robust and Efficient Machine Learning System	8
A Tree-Shaped Tableau for Checking the Satisfiability of Signal Temporal Logic with Bounded Temporal Operators	8
Robust Embedded Autonomous Driving Positioning System Fusing LiDAR and Inertial Sensors	8
Analysis of EM Fault Injection on Bit-sliced Number Theoretic Transform Software in Dilithium	8
Lightweight Champions of the World: Side-Channel Resistant Open Hardware for Finalists in the NIST Lightweight Cryptography Standardization Process	8
FT-DAG: An Efficient Full-Topology DAG Generator with Controllable Parameters	8
SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks	8
Selective Subarray Isolation for Mitigating RowHammer Attack	7
Attack-resilient Fusion of Sensor Data with Uncertain Delays	7
Design Flow for Scheduling Spiking Deep Convolutional Neural Networks on Heterogeneous Neuromorphic System-on-chip	7
Software Optimization and Design Methodology for Low Power Computer Vision Systems	7
Register Blocking: A Source-to-Source Analytical Modelling Approach for Affine Loop Kernels	7
Let Coarse-Grained Resources Be Shared: Mapping Entire Neural Networks on FPGAs	7
A Compact and Parallel Swap-Based Shuffler Based on Butterfly Network and Its Complexity Against Side Channel Analysis	7
Code Generation for Neural Networks Based on Fixed-point Arithmetic	7
DaCapo: An On-Device Learning Scheme for Memory-Constrained Embedded Systems	7
Predictive Monitoring with Logic-Calibrated Uncertainty for Cyber-Physical Systems	7
Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on Program Inputs	7
HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography	7
Regular Composite Resource Partitioning and Reconfiguration in Open Systems	7
CrossTalk : Making Low-Latency Fault Tolerance Cheap by Exploiting Redundant Networks	6
Combining Weight Approximation, Sharing and Retraining for Neural Network Model Compression	6
Virtual Environment Model Generation for CPS Goal Verification using Imitation Learning	6
An Investigation on Hardware-Aware Vision Transformer Scaling	6
COBRRA: COntention-aware cache Bypass with Request-Response Arbitration	6
CORIDOR: Using CO herence and Tempo R al Local I ty to Mitigate Read D isurb	6
HeterogeneousRTOS: A CPU-FPGA Real-Time OS for Fault Tolerance on COTS at Near-Zero Timing Cost	6
Benchmarking and Configuring Security Levels in Intermittent Computing	6
RIMMS: Runtime Integrated Memory Management System for Heterogeneous Computing	6
Scenario Based Run-Time Switching for Adaptive CNN-Based Applications at the Edge	6
Deadline-Aware Task Offloading for Vehicular Edge Computing Networks Using Traffic Light Data	6
TimelyNet: Adaptive Neural Architecture for Autonomous Driving with Dynamic Deadline	6
A Survey of Blockchain Data Management Systems	6

Improving Variational Autoencoder based Out-of-Distribution Detection for Embedded Real-time Applications	6
MARS: mmWave-based Assistive Rehabilitation System for Smart Healthcare	6
Improving Robustness in IoT Malware Detection through Execution Order Analysis	6
Optimal Checkpointing Strategy for Real-time Systems with Both Logical and Timing Correctness	6
A Configurable CRYSTALS-Kyber Hardware Implementation with Side-Channel Protection	6
RAD-FS: Remote Timing and Power SCA Security in DVFS-augmented Ultra-Low-Power Embedded Systems	6
High-Level Approaches to Hardware Security: A Tutorial	6
Synergistically Exploiting CNN Pruning and HLS Versioning for Adaptive Inference on Multi-FPGAs at the Edge	6
GINA: Exploiting Graph Neural Network Layer Features for Energy Efficient Inferencing in NVM-based PIM Accelerators	6
SPHINCSLET: An Area-Efficient Accelerator for the Full SPHINCS+ Digital Signature Algorithm	6
MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation	6
Federated Scheduling of Sporadic DAGs on Unrelated Multiprocessors	6
Verified Compilation of Synchronous Dataflow with State Machines	6