ACM Transactions on Architecture and Code Optimization

Papers
(The TQCC of ACM Transactions on Architecture and Code Optimization is 4. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-06-01 to 2026-06-01.)
ArticleCitations
TNT: A Modular Approach to Traversing Physically Heterogeneous NOCs at Bare-wire Latency52
ASM: An Adaptive Secure Multicore for Co-located Mutually Distrusting Processes48
An Intelligent Scheduling Approach on Mobile OS for Optimizing UI Smoothness and Power30
TransCL: An Automatic CUDA-to-OpenCL Programs Transformation Framework29
ESMPC: An Efficient Neural Network Training Framework for Secure Two- and Three-Party Computation28
Accelerating Verifiable Queries over Blockchain Database System Using Processing-in-memory28
ModNEF : An Open Source Modular Neuromorphic Emulator for FPGA for Low-Power In-Edge Artificial Intelligence26
Intra-request Lag-aware Cache Management to Enhance I/O Responsiveness of SSDs26
Highly Efficient Self-checking Matrix Multiplication on Tiled AMX Accelerators24
Supporting QoS Guarantee in Heterogeneous Object Storage System: A Spatio-Temporal Graph Data Processing Method24
HierMine: Accelerating Graph Pattern Mining via Hierarchical Sampling22
Performance, Energy and NVM Lifetime-Aware Data Structure Refinement and Placement for Heterogeneous Memory Systems22
A Concise Concurrent B + -Tree for Persistent Memory18
Tiaozhuan: A General and Efficient Indirect Branch Optimization for Binary Translation18
Characterizing Digital DRAM PIM through Modeling and Benchmarking18
DCMA: Accelerating Parallel DMA Transfers with a Multi-Port Direct Cached Memory Access in a Massive-Parallel Vector Processor17
COER: A Network Interface Offloading Architecture for RDMA and Congestion Control Protocol Codesign16
Source Matching and Rewriting for MLIR Using String-Based Automata16
Fast Convolution Meets Low Precision: Exploring Efficient Quantized Winograd Convolution on Modern CPUs16
MLKAPS: Machine Learning and Adaptive Sampling for HPC Kernel Auto-tuning15
FlashGEMM: Optimizing Sequences of Matrix Multiplication by Exploiting Data Reuse on CPUs13
DeepZoning: Re-accelerate CNN Inference with Zoning Graph for Heterogeneous Edge Cluster12
Mentor: A Memory-Efficient Sparse-dense Matrix Multiplication Accelerator Based on Column-Wise Product12
iSwap: A New Memory Page Swap Mechanism for Reducing Ineffective I/O Operations in Cloud Environments12
Osiris: A Systolic Approach to Accelerating Fully Homomorphic Encryption12
Mitigating the Bandwidth Wall via Data-Streaming System–Accelerator Co-Design11
A NUMA-Aware Version of an Adaptive Self-Scheduling Loop Scheduler11
COX : Exposing CUDA Warp-level Functions to CPUs10
ODGS: Dependency-Aware Scheduling for High-Level Synthesis with Graph Neural Network and Reinforcement Learning10
AG-SpTRSV: An Automatic Framework to Optimize Sparse Triangular Solve on GPUs10
Flexible and Effective Object Tiering for Heterogeneous Memory Systems10
SnsBooster: Enhancing Sampling-based μ Arch Evaluation Efficiency through Online Performance Sensitivity Analysis10
FDSR: Efficient Model Training via Adaptive Tensor Quantization Based on Frequency Domain Division and Similarity Data Reuse9
Power Scheduling for Maximizing Throughput and Fairness in Co-running Applications9
Efficient Cross-platform Multiplexing of Hardware Performance Counters via Adaptive Grouping9
Advancing Direct Convolution Using Convolution Slicing Optimization and ISA Extensions9
GraphSER: Distance-Aware Stream-Based Edge Repartition for Many-Core Systems9
Accelerating Parallel Structures in DNNs via Parallel Fusion and Operator Co-Optimization9
BridgeGC: An Efficient Cross-Level Garbage Collector for Big Data Frameworks9
Towards high scalability and fine-grained parallelism on distributed HPC platforms9
Quantifying Resource Contention of Co-located Workloads with the System-level Entropy9
Accelerating Nearest Neighbor Search in 3D Point Cloud Registration on GPUs9
EXPERTISE: An Effective Software-level Redundant Multithreading Scheme against Hardware Faults9
Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture8
TPRepair: Tree-based Pipelined Repair in Clustered Storage Systems8
A Fast and Flexible FPGA-based Accelerator for Natural Language Processing Neural Networks8
A Step toward Stateful HW-SW Migration: An Architecture-agnostic Checkpointing-rollback Toolchain8
PowerMorph: QoS-Aware Server Power Reshaping for Data Center Regulation Service8
HyGain: High-performance, Energy-efficient Hybrid Gain Cell-based Cache Hierarchy8
CLAP: Cross-Layer Adaptive Pipelining Inference Scheduling for Resource-Efficient Edge-Cloud Vision Systems8
NEM-GNN: DAC/ADC-less, Scalable, Reconfigurable, Graph and Sparsity-Aware Near-Memory Accelerator for Graph Neural Networks8
Environmental Condition Aware Super-Resolution Acceleration Framework in Server-Client Hierarchies8
Towards High Performance QNNs via Distribution-Based CNOT Gate Reduction8
Optimizing Attention for Large Language Model Inference on the MT-3000 Many-Core Processor8
WSGraph: A Framework for Tackling Redundant and Irregular Data Access in Streaming Graph Processing7
Enabling Low-Latency, GPU-Efficient Serverless Inference with Model Swapping7
CML-PowF: Data Clustering Matching Based Low-overhead Multiple CPU Real-time Power Forecasting7
Multi-objective Hardware-aware Neural Architecture Search with Pareto Rank-preserving Surrogate Models7
A Decoupled Analytical Model for Tile Size Selection in Affine Programs7
RT-GNN: Accelerating Sparse Graph Neural Networks by Tensor-CUDA Kernel Fusion7
Orchard: Heterogeneous Parallelism and Fine-grained Fusion for Complex Tree Traversals7
HEngine: A High Performance Optimization Framework on a GPU for Homomorphic Encryption7
PctoDL: Adaptive GPU Throughput Optimization for Deep Learning Inference with Power Constraints7
RaNAS: Resource-Aware Neural Architecture Search for Edge Computing7
DTAP: Accelerating Strongly-Typed Programs with Data Type-Aware Hardware Prefetching7
Mobile-3DCNN: An Acceleration Framework for Ultra-Real-Time Execution of Large 3D CNNs on Mobile Devices6
EDAS: Enabling Fast Data Loading for GPU Serverless Computing6
HiSo: Co-optimizing the Intra-layer and Inter-layer Scheduling Schemes with the Hybrid Data Flow for PIM Architectures6
Towards Optimizing Learned Index for High Performance, Memory Efficiency and NUMA Awareness6
SimTrace: Exploiting Spatial and Temporal Sampling for Large-Scale Performance Analysis6
gECC: A GPU-based high-throughput framework for Elliptic Curve Cryptography6
Enabling Efficient Vector Processing: A Heterogeneous Vector Architecture with in-SRAM Computing6
A Memory-Aware Sparse Matrix-Matrix Multiplication on Multicore Architectures6
A Stable Idle Time Detection Platform for Real I/O Workloads6
RACER: Avoiding End-to-End Slowdowns in Accelerated Chip Multi-Processors6
Pac-PIM: A Parallel Communication Framework for Commodity Processing-in-memory Systems6
MemoriaNova: Optimizing Memory-Aware Model Inference for Edge Computing6
BLR-Krylov: A Single-GPU Iterative SpMM Framework with Communication Avoidance and Block Low-Rank Optimization5
Shift-CIM: In-SRAM Alignment To Support General-Purpose Bit-level Sparsity Exploration in SRAM Multiplication5
Improving Utilization of Dataflow Unit for Multi-Batch Processing5
Accelerating the Simulation of Parallel Workloads using Loop-Bounded Checkpoints5
Stripe-schedule Aware Repair in Erasure-coded Clusters with Heterogeneous Star Networks5
Exploring Data Layout for Sparse Tensor Times Dense Matrix on GPUs5
Accelerating Convolutional Neural Network by Exploiting Sparsity on GPUs5
WIPE: A Write-Optimized Learned Index for Persistent Memory5
OptiFX: Automatic Optimization for Convolutional Neural Networks with Aggressive Operator Fusion on GPUs5
x Meta : SSD-HDD-hybrid Optimization for Metadata Maintenance of Cloud-scale Object Storage5
PaTGen: Temporal Similarity-Driven Proxy Benchmark Generation Method for Cloud Workloads5
FlexHM: A Practical System for Heterogeneous Memory with Flexible and Efficient Performance Optimizations5
Toward Comprehensive Design Space Exploration on Heterogeneous Multi-core Processors5
Efficient and Scalable Hybrid Parallelization of Unstructured Computational Fluid Dynamics with Geometric Multigrid5
JiuJITsu: Removing Gadgets with Safe Register Allocation for JIT Code Generation5
GraphTune: An Efficient Dependency-Aware Substrate to Alleviate Irregularity in Concurrent Graph Processing5
Lightweight Code Outlining for Android Applications5
CGCGraph: Efficient CPU-GPU Co-execution for Concurrent Dynamic Graph Processing5
Performance Prediction of Concurrent DNN Training Tasks in GPU Spatial Sharing Environments5
BLG-Tuning: Benchmark-Based Low-Cost General-Purpose I/O Modeling and Tuning4
Efficient Flexible Edge Inference for Mixed-Precision Quantized DNN using Customized RISC-V Core4
Scale-out Systolic Arrays4
CoolDC: A Cost-Effective Immersion-Cooled Datacenter with Workload-Aware Temperature Scaling4
Analytical Modeling of Set-Associative Caches for Optimizing Tensor Operations4
Consequence-based Clustered Architecture4
TSN Cache: Exploiting Data Localities in Graph Computing Applications4
MetaEC: An Efficient and Resilient Erasure-Coded KV Store on Disaggregated Memory4
Capability-Based Efficient Data Transmission Mechanism for Serverless Computing4
SplitZNS: Towards an Efficient LSM-Tree on Zoned Namespace SSDs4
Architecting Optically Controlled Phase Change Memory4
Iterating Pointers: Enabling Static Analysis for Loop-based Pointers4
Address/Data Instruction Steering in Clustered General Purpose Processors4
RaKV: A Write-Optimized LSM Store for Cloud Block Storage with Robust SLA4
Koala: Efficient Pipeline Training through Automated Schedule Searching on Domain-Specific Language4
BullsEye : Scalable and Accurate Approximation Framework for Cache Miss Calculation4
Architectural Support for Sharing, Isolating and Virtualizing FPGA Resources4
Rethinking Variable-Length Encoding: Exploiting Bit Sparsity for Parallel Decoding in LLM Accelerators4
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