ACM Transactions on Architecture and Code Optimization

Papers
(The TQCC of ACM Transactions on Architecture and Code Optimization is 4. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-11-01 to 2025-11-01.)
ArticleCitations
Performance, Energy and NVM Lifetime-Aware Data Structure Refinement and Placement for Heterogeneous Memory Systems44
An Intelligent Scheduling Approach on Mobile OS for Optimizing UI Smoothness and Power36
TNT: A Modular Approach to Traversing Physically Heterogeneous NOCs at Bare-wire Latency31
Object Intersection Captures on Interactive Apps to Drive a Crowd-sourced Replay-based Compiler Optimization26
Highly Efficient Self-checking Matrix Multiplication on Tiled AMX Accelerators26
ASM: An Adaptive Secure Multicore for Co-located Mutually Distrusting Processes22
TransCL: An Automatic CUDA-to-OpenCL Programs Transformation Framework21
ModNEF : An Open Source Modular Neuromorphic Emulator for FPGA for Low-Power In-Edge Artificial Intelligence20
Accelerating Verifiable Queries over Blockchain Database System Using Processing-in-memory20
Intra-request Lag-aware Cache Management to Enhance I/O Responsiveness of SSDs17
ESMPC: An Efficient Neural Network Training Framework for Secure Two- and Three-Party Computation17
An Accelerator for Sparse Convolutional Neural Networks Leveraging Systolic General Matrix-matrix Multiplication16
Tiaozhuan: A General and Efficient Indirect Branch Optimization for Binary Translation16
COER: A Network Interface Offloading Architecture for RDMA and Congestion Control Protocol Codesign15
DCMA: Accelerating Parallel DMA Transfers with a Multi-Port Direct Cached Memory Access in a Massive-Parallel Vector Processor14
A Concise Concurrent B + -Tree for Persistent Memory13
Fast Convolution Meets Low Precision: Exploring Efficient Quantized Winograd Convolution on Modern CPUs13
Source Matching and Rewriting for MLIR Using String-Based Automata13
SIMD-Matcher: A SIMD-based Arbitrary Matching Framework13
Building a Fast and Efficient LSM-tree Store by Integrating Local Storage with Cloud Storage12
Locality-Aware CTA Scheduling for Gaming Applications12
FlashGEMM: Optimizing Sequences of Matrix Multiplication by Exploiting Data Reuse on CPUs12
Mentor: A Memory-Efficient Sparse-dense Matrix Multiplication Accelerator Based on Column-Wise Product11
iSwap: A New Memory Page Swap Mechanism for Reducing Ineffective I/O Operations in Cloud Environments11
A NUMA-Aware Version of an Adaptive Self-Scheduling Loop Scheduler10
Accelerating Video Captioning on Heterogeneous System Architectures10
DeepZoning: Re-accelerate CNN Inference with Zoning Graph for Heterogeneous Edge Cluster9
COX : Exposing CUDA Warp-level Functions to CPUs9
MLKAPS: Machine Learning and Adaptive Sampling for HPC Kernel Auto-tuning9
AG-SpTRSV: An Automatic Framework to Optimize Sparse Triangular Solve on GPUs9
GraphSER: Distance-Aware Stream-Based Edge Repartition for Many-Core Systems9
Flexible and Effective Object Tiering for Heterogeneous Memory Systems9
Accelerating Parallel Structures in DNNs via Parallel Fusion and Operator Co-Optimization8
SnsBooster: Enhancing Sampling-based μ Arch Evaluation Efficiency through Online Performance Sensitivity Analysis8
An FPGA Overlay for CNN Inference with Fine-grained Flexible Parallelism8
Accelerating Nearest Neighbor Search in 3D Point Cloud Registration on GPUs8
NEM-GNN: DAC/ADC-less, Scalable, Reconfigurable, Graph and Sparsity-Aware Near-Memory Accelerator for Graph Neural Networks8
Quantifying Resource Contention of Co-located Workloads with the System-level Entropy8
ODGS: Dependency-Aware Scheduling for High-Level Synthesis with Graph Neural Network and Reinforcement Learning8
Advancing Direct Convolution Using Convolution Slicing Optimization and ISA Extensions7
BridgeGC: An Efficient Cross-Level Garbage Collector for Big Data Frameworks7
Efficient Cross-platform Multiplexing of Hardware Performance Counters via Adaptive Grouping7
Joint Program and Layout Transformations to Enable Convolutional Operators on Specialized Hardware Based on Constraint Programming7
Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture7
A Fast and Flexible FPGA-based Accelerator for Natural Language Processing Neural Networks7
EXPERTISE: An Effective Software-level Redundant Multithreading Scheme against Hardware Faults7
Low-power Near-data Instruction Execution Leveraging Opcode-based Timing Analysis6
Multi-objective Hardware-aware Neural Architecture Search with Pareto Rank-preserving Surrogate Models6
DTAP: Accelerating Strongly-Typed Programs with Data Type-Aware Hardware Prefetching6
PowerMorph: QoS-Aware Server Power Reshaping for Data Center Regulation Service6
Environmental Condition Aware Super-Resolution Acceleration Framework in Server-Client Hierarchies6
RT-GNN: Accelerating Sparse Graph Neural Networks by Tensor-CUDA Kernel Fusion6
Orchard: Heterogeneous Parallelism and Fine-grained Fusion for Complex Tree Traversals6
RaNAS: Resource-Aware Neural Architecture Search for Edge Computing6
Towards High Performance QNNs via Distribution-Based CNOT Gate Reduction6
HEngine: A High Performance Optimization Framework on a GPU for Homomorphic Encryption6
MemoriaNova: Optimizing Memory-Aware Model Inference for Edge Computing6
HyGain: High-performance, Energy-efficient Hybrid Gain Cell-based Cache Hierarchy6
TPRepair: Tree-based Pipelined Repair in Clustered Storage Systems6
A Stable Idle Time Detection Platform for Real I/O Workloads5
Towards Optimizing Learned Index for High Performance, Memory Efficiency and NUMA Awareness5
Exploring Data Layout for Sparse Tensor Times Dense Matrix on GPUs5
Accelerating Convolutional Neural Network by Exploiting Sparsity on GPUs5
Stripe-schedule Aware Repair in Erasure-coded Clusters with Heterogeneous Star Networks5
WIPE: A Write-Optimized Learned Index for Persistent Memory5
ERASE: Energy Efficient Task Mapping and Resource Management for Work Stealing Runtimes5
gECC: A GPU-based high-throughput framework for Elliptic Curve Cryptography5
Mobile-3DCNN: An Acceleration Framework for Ultra-Real-Time Execution of Large 3D CNNs on Mobile Devices5
GraphTune: An Efficient Dependency-Aware Substrate to Alleviate Irregularity in Concurrent Graph Processing5
RACER: Avoiding End-to-End Slowdowns in Accelerated Chip Multi-Processors5
Toward Comprehensive Design Space Exploration on Heterogeneous Multi-core Processors5
SimTrace: Exploiting Spatial and Temporal Sampling for Large-Scale Performance Analysis5
EDAS: Enabling Fast Data Loading for GPU Serverless Computing5
FlexHM: A Practical System for Heterogeneous Memory with Flexible and Efficient Performance Optimizations5
CGCGraph: Efficient CPU-GPU Co-execution for Concurrent Dynamic Graph Processing5
Improving Utilization of Dataflow Unit for Multi-Batch Processing5
OptiFX: Automatic Optimization for Convolutional Neural Networks with Aggressive Operator Fusion on GPUs5
Scale-out Systolic Arrays4
Architecting Optically Controlled Phase Change Memory4
SplitZNS: Towards an Efficient LSM-Tree on Zoned Namespace SSDs4
Shift-CIM: In-SRAM Alignment To Support General-Purpose Bit-level Sparsity Exploration in SRAM Multiplication4
JiuJITsu: Removing Gadgets with Safe Register Allocation for JIT Code Generation4
Koala: Efficient Pipeline Training through Automated Schedule Searching on Domain-Specific Language4
Efficient Flexible Edge Inference for Mixed-Precision Quantized DNN using Customized RISC-V Core4
BullsEye : Scalable and Accurate Approximation Framework for Cache Miss Calculation4
Capability-Based Efficient Data Transmission Mechanism for Serverless Computing4
x Meta : SSD-HDD-hybrid Optimization for Metadata Maintenance of Cloud-scale Object Storage4
CASHT: Contention Analysis in Shared Hierarchies with Thefts4
Address/Data Instruction Steering in Clustered General Purpose Processors4
Architectural Support for Sharing, Isolating and Virtualizing FPGA Resources4
MetaEC: An Efficient and Resilient Erasure-Coded KV Store on Disaggregated Memory4
CoolDC: A Cost-Effective Immersion-Cooled Datacenter with Workload-Aware Temperature Scaling4
TSN Cache: Exploiting Data Localities in Graph Computing Applications4
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