IEEE Transactions on Circuits and Systems Ii-Express Briefs

Papers
(The H4-Index of IEEE Transactions on Circuits and Systems Ii-Express Briefs is 38. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-09-01 to 2025-09-01.)
ArticleCitations
Member Get-A-Member (MGM) Program155
IEEE CIRCUITS AND SYSTEMS SOCIETY98
Table of Contents98
IEEE CIRCUITS AND SYSTEMS SOCIETY94
A 0.4-V 500-kHz FLL With Reused TDA-Based Calibration and OTA-Accelerated Technique in 65-nm CMOS for Sleep Timer88
Active Diode of 100 Hz-4 MHz-Span With Bias-Free Analog Control Circuit76
High-Precision GRO-Based ROIC Adopting Sliding Scale Average Method for SPAD Array75
A 48-Gb/s Baud-Rate PAM-4 Receiver Using Modified Time-Interpolated Latches73
Cooperative Fault Diagnosis of Fuzzy Fractional Order Time-Varying Multi-Agent System With Directed Networks63
Prespecified-Time Observer-Based Distributed Control of Battery Energy Storage Systems59
Consensus of Discrete-Time Leader-Following Linear Multi-Agent Systems Under Lyapunov-Function-Based Event-Triggered Mechanism58
Enhanced Cross-Modal Transformer Model for Video Semantic Similarity Measurement55
Extended H Filtering in RKHS for Nonlinear Systems With Uncertainty54
A 0.5-8GHz Reconfigurable CMOS RF Receiver Front-End for CR and DPA Applications54
A 0.5-V Voltage Reference Using Simple Common-Source Amplifier With Improved Gain53
MANA Formulation Based Load Flow Solution for DC Distribution Networks52
A 0.15mm² Energy-Efficient Single-Ended Capacitance-to-Digital Converter52
An 8-bit 1.24 mW Sub-1ps DNL Sub-1V Supply Inverter-Based Phase Interpolator Using a PVT-Tracking Adaptive-Bias Circuit49
Neural Learning Control for Discrete-Time Strict-Feedback Systems: An Error Estimate Method48
A Wideband Sliding Correlation Channel Sounder in 65 nm CMOS: Evaluation Board Performance48
Stability Analysis of a Class of Fractional-Order Nonlinear Systems Under Unknown Stochastic Disturbance and Actuator Saturation48
On Set Stability of Finite-Field Networks47
A CMOS Complementary Common Gate Capacitive Cross-Coupled Frequency Doubler46
A Reconfigurable Coprocessor for Simultaneous Localization and Mapping Algorithms in FPGA45
Designing Sequences for the Coexistence of Radar With Extended Target and Communication Energy Harvesting45
A Bulk Current Regulation Technique for Dual-Branch Cross-Coupled Charge Pumps44
Predictive Consensus for Networked Multi-Agent Systems With Switching Topology, Input Delay and Time-Varying Communication Delays44
A Multi-Memristive Unit-Cell Array With Diagonal Interconnects for In-Memory Computing43
A Fully Packaged Wideband Bandpass Power Divider Based on Four-Port Common-Mode Network42
Finite-Time Bipartite Tracking Consensus of Fractional-Order Multi-Layer Signed Networks by Aperiodically Intermittent Control42
A Novel Blind High-Order Modulation Classifier Using Accumulated Constellation Temporal Convolution for OSTBC-OFDM Systems41
Backstepping-Based Finite-Time Control for High-Order Discrete-Time Systems41
BusMap: Application Mapping With Bus Routing for Coarse-Grained Reconfigurable Array41
Mobile Robot Circumnavigating an Unknown Target Using Only Range Rate Measurement40
Joint Topology Learning and Graph Signal Recovery Using Variational Bayes in Non-Gaussian Noise40
Global Output-Feedback Stabilization for Uncertain Feedforward Nonlinear Systems via Dynamic Event-Triggered Control39
A Magnetless 4-Port Circulator and Its Microstrip Implementation39
Event-Triggered Synchronization for Discrete-Time Neural Networks With Unknown Delays38
An Energy-Efficient Visual Object Tracking Processor Exploiting Domain-Specific Features38
Optimal Optical Receivers in Nanoscale CMOS: A Tutorial38
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