IEEE Transactions on Circuits and Systems Ii-Express Briefs

Papers
(The H4-Index of IEEE Transactions on Circuits and Systems Ii-Express Briefs is 40. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-11-01 to 2025-11-01.)
ArticleCitations
IEEE CIRCUITS AND SYSTEMS SOCIETY173
Member Get-A-Member (MGM) Program106
IEEE CIRCUITS AND SYSTEMS SOCIETY101
Table of Contents91
Backstepping-Based Finite-Time Control for High-Order Discrete-Time Systems89
Lightweight ECC Coprocessor With Resistance Against Power Analysis Attacks Over NIST Prime Fields85
A 0.4-V 500-kHz FLL With Reused TDA-Based Calibration and OTA-Accelerated Technique in 65-nm CMOS for Sleep Timer79
Active Diode of 100 Hz-4 MHz-Span With Bias-Free Analog Control Circuit78
High-Precision GRO-Based ROIC Adopting Sliding Scale Average Method for SPAD Array70
A 48-Gb/s Baud-Rate PAM-4 Receiver Using Modified Time-Interpolated Latches66
Neural Learning Control for Discrete-Time Strict-Feedback Systems: An Error Estimate Method60
A Fully Packaged Wideband Bandpass Power Divider Based on Four-Port Common-Mode Network60
Cooperative Fault Diagnosis of Fuzzy Fractional Order Time-Varying Multi-Agent System With Directed Networks59
Enhanced Cross-Modal Transformer Model for Video Semantic Similarity Measurement57
Prespecified-Time Observer-Based Distributed Control of Battery Energy Storage Systems57
A 0.5-8GHz Reconfigurable CMOS RF Receiver Front-End for CR and DPA Applications55
A 0.5-V Voltage Reference Using Simple Common-Source Amplifier With Improved Gain54
A 0.15mm² Energy-Efficient Single-Ended Capacitance-to-Digital Converter53
BusMap: Application Mapping With Bus Routing for Coarse-Grained Reconfigurable Array51
Anonymous Quantum Sealed-Bid Auction51
Experimental Detection for Extreme Multistability via DC-Controlled Memristor Emulator51
Consensus of Lur’e Multi-Agent Systems With Directed Switching Topology50
Design of Compact Size CMOS VCO Using Dual-Primary Transformer With Dual-Core for Wide Tuning-Range49
Area-Time-Efficient Scalable Schoolbook Polynomial Multiplier for Lattice-Based Cryptography47
Self-Calibrated Digital Two-Point Modulator for BLE RF Transmitter47
A Bipolar 3-Level High-Voltage Pulser for Highly Integrated Ultrasound Imaging Systems45
Predictive Consensus for Networked Multi-Agent Systems With Switching Topology, Input Delay and Time-Varying Communication Delays44
A Wideband Frequency-Independent IQ Calibration Scheme With 3-GHz-UGB Amplifiers44
A Fast Spiking Neural Network Accelerator based on BP-STDP Algorithm and Weighted Neuron Model44
A CMOS Complementary Common Gate Capacitive Cross-Coupled Frequency Doubler43
A Multi-Channel Direct-Digital-Conversion Front-End Based on Current-Domain Frequency Division Multiplexing43
A Novel Blind High-Order Modulation Classifier Using Accumulated Constellation Temporal Convolution for OSTBC-OFDM Systems42
Reachable Set Estimation of Inertial Complex-Valued Memristive Neural Networks42
An Efficient Broadband Symmetrical Doherty Power Amplifier With Extended Back-Off Range41
Cloud-Based Time-Varying Formation Predictive Control of Multi-Agent Systems With Random Communication Constraints and Quantized Signals41
Prescribed Performance-Based Low-Complexity Adaptive 2-Bit-Triggered Control for Unknown Nonlinear Systems With Actuator Dead-Zone41
Stabilization of 5G Telecom Converter-Based Deep Type-3 Fuzzy Machine Learning Control for Telecom Applications41
SecRouting: Secure Routing for Network Functions Virtualization (NFV) Technology40
Quantum Computing Gate Emulation Using CMOS Oscillatory Cellular Neural Networks40
Compact Waveguide Power Divider Using Magic-Tee With Integrated Impedance Transformers40
Automatic Guided Vehicle Wireless Charging With Dual Receiving Coils for Misalignment Tolerance40
0.40021991729736