OOIR: Observatory of International Research

Papers

(The TQCC of ACM Journal on Emerging Technologies in Computing Systems is 5. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2020-05-01 to 2024-05-01.)

Article	Citations
The Big Hack Explained	46
Extracting Success from IBM’s 20-Qubit Machines Using Error-Aware Compilation	46
A Survey on Silicon Photonics for Deep Learning	45
Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives	44
Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach	42
A Side-Channel-Resistant Implementation of SABER	31
NxTF: An API and Compiler for Deep Spiking Neural Networks on Intel Loihi	21
OpenQL: A Portable Quantum Programming Framework for Quantum Accelerators	19
Toward Multi-FPGA Acceleration of the Neural Networks	18
Defects, Fault Modeling, and Test Development Framework for RRAMs	17
Dynamic Reliability Management in Neuromorphic Computing	16
Design of Adiabatic Logic-Based Energy-Efficient and Reliable PUF for IoT Devices	16
A Flexible Multichannel EEG Artifact Identification Processor using Depthwise-Separable Convolutional Neural Networks	14
Design and Analysis of FPGA-based PUFs with Enhanced Performance for Hardware-oriented Security	14
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems	13
Mitigate Parasitic Resistance in Resistive Crossbar-based Convolutional Neural Networks	13
Sorting in Memristive Memory	11
Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks	11
Design of a Robust Memristive Spiking Neuromorphic System with Unsupervised Learning in Hardware	10
EM-X-DL: Efficient Cross-device Deep Learning Side-channel Attack With Noisy EM Signatures	10
A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators	10
CONCEALING-Gate: Optical Contactless Probing Resilient Design	10
Guarding Machine Learning Hardware Against Physical Side-channel Attacks	10
A Voltage-Controlled, Oscillation-Based ADC Design for Computation-in-Memory Architectures Using Emerging ReRAMs	10
Cryptography with Analog Scheme Using Memristors	9

An Electro-Photonic System for Accelerating Deep Neural Networks	9
A Survey on Memory-centric Computer Architectures	9
A Lightweight Architecture for Hardware-Based Security in the Emerging Era of Systems of Systems	9
BPLight-CNN: A Photonics-Based Backpropagation Accelerator for Deep Learning	9
Hardware Trojan Detection Using Unsupervised Deep Learning on Quantum Diamond Microscope Magnetic Field Images	8
Computational Capacity of Complex Memcapacitive Networks	8
Resilient and Secure Hardware Devices Using ASL	8
A Cost-Efficient Digital ESN Architecture on FPGA for OFDM Symbol Detection	8
Fortifying Vehicular Security through Low Overhead Physically Unclonable Functions	8
Robust and Attack Resilient Logic Locking with a High Application-Level Impact	8
Analyzing Security Vulnerabilities Induced by High-level Synthesis	8
MNEMOSENE: Tile Architecture and Simulator for Memristor-based Computation-in-memory	7
A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors	7
ScatterVerif: Verification of Electronic Boards Using Reflection Response of Power Distribution Network	7
A Review and Comparison of AI-enhanced Side Channel Analysis	7
Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm	6
NORM: An FPGA-based Non-volatile Memory Emulation Framework for Intermittent Computing	6
Making a Case for Partially Connected 3D NoC	6
Machine Learning Vulnerability Analysis of FPGA-based Ring Oscillator PUFs and Counter Measures	6
PUF based Secure and Lightweight Authentication and Key-Sharing Scheme for Wireless Sensor Network	6
ASIE	6
A Quality-assured Approximate Hardware Accelerators–based on Machine Learning and Dynamic Partial Reconfiguration	6
Artificial Intelligence–based Computed Tomography Processing Framework for Surgical Telementoring of Congenital Heart Disease	6
RNNFast	6
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs	5
Device-aware Circuit Design for Robust Memristive Neuromorphic Systems with STDP-based Learning	5
CLU	5
Binary Precision Neural Network Manycore Accelerator	5
Thermal and Performance Efficient On-Chip Surface-Wave Communication for Many-Core Systems in Dark Silicon Era	5
Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier	5
Reliable Constructions for the Key Generator of Code-based Post-quantum Cryptosystems on FPGA	5
Low Overhead Online Data Flow Tracking for Intermittently Powered Non-Volatile FPGAs	5
Hardware Security in Spin-based Computing-in-memory	5