Journal of Semiconductor Technology and Science

Papers
(The TQCC of Journal of Semiconductor Technology and Science is 1. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-11-01 to 2025-11-01.)
ArticleCitations
2 Lanes × 2.65-6.4 Gb/s Scalable IO Transceiver with Delay Compensation Technique in 65 nm CMOS Process23
Implementation and Performance Analysis of Elliptic Curve Cryptography using an Efficient Multiplier10
Design and Analysis of DC/DC Boost Converter Vertical GaN Power Device based on Epitaxially Grown GaN-on-sapphire10
A 262 MHz Narrow Band RF Transceiver for Korean M-Bus Smart Metering Service8
Design of an Approximate Adder based on Modified Full Adder and Nonzero Truncation for Machine Learning8
A 97.7-dB DR 12.3-μW 1-kHz Bandwidth 2<SUP>nd</SUP> Order Delta-sigma Modulator with a Fully Differential Class-AB Op-Amp using Floating Class-AB Control7
Empirical Analysis of Disaggregated Cloud Memory on Memory Intensive Applications6
Design of ZnO with Reduced Direct Bandgap using First-principles Calculation: Electronic, Band Structure, and Optical Properties5
Sample-Efficient Reinforcement Learning for Analog Circuit Optimization with Intrinsic Reward5
A New Coupling Spring Design for MEMS Tuning Fork Structures Demonstrating Robustness to Fabrication Errors and Linear Accelerations5
Design of a Floating-bulk NMOS Triggered GGNMOS with Low Triggering Voltage and High Robustness Aimed at 3.3 V I/O ESD Protectio4
Prediction Methodology for Next-generation Device Characteristics using Machine Learning4
An 80 dB Second-order Noise Shaping SAR ADC using Differential Integral Capacitors and Comparator with Voltage Gain Calibration4
An Entropy Model for GPU Register Compression3
Analysis of FinFET Based Positive Feedback Symmetric Adiabatic Logic for Performance and Security Characteristics3
Design of Various Dipolar Source for Improvement of Electrostatic Discharge Protection Performance of 0.18 μm_30 V DDDNMOS Transistor for High Voltage Application3
A Wide Input Range, Low-noise Neural Recording Amplifier IC With Adaptive Gain Control and Common-mode Cancellation Loop3
Study on the Circuit Performance of Various Interconnect Metal Materials in the Latest Process Nodes3
High-performance Sum Operation with Charge Saving and Sharing Circuit for MRAM-based In-memory Computing3
A Development of a Robust Computer Vision-based Framework for Metrology and Inspection of Stacked Die in HBM Process3
Lossless LUT Compressions for Image Enhancement3
Analysis of Cell Current with Abnormal Channel Profile in 3D NAND Flash Memory3
Extension of DRAM Retention Time at 77 Kelvin by Replacing Weak Rows with Large GIDL Current3
Chemoresistive Gas Sensors for Food Quality Monitoring3
Ultra-low Power Readout Circuit Design and Simulation using Dynamic Wheatstone Bridge Technique for Implantable Body Temperature Sensor Application2
Electrical Performance Depending on the Grain Boundary-location in the Multiple Nanosheet Tunneling Field-effect Transistor based on the Poly-Si2
Fault-tolerant Algebraic Interleaver Architecture for IDMA Systems in Harsh Environments2
A 16 GHz 1-511 Broadband Programmable Frequency Divider2
A Second-order Delta-sigma Modulator for Battery Management System DC Measurement2
RADAR: An Efficient FPGA-based ResNet Accelerator with Data-aware Reordering of Processing Sequences2
Analysis of the Effects of Bonding Misalignment on Current Density and Resistance Variation in Semiconductor Packaging Processes2
A Lightweight AES-256 Accelerator Design through Processing Order Optimization for Low-cost Hardware Security2
A 32.2 GHz Full Adder Designed with TLE Method in a InP DHBT Technology2
Investigation of Mechanical Stability during Electro-thermal Annealing in a 3D NAND Flash Memory String2
D-RDMALib: InfiniBand-based RDMA Library for Distributed Cluster Applications2
A 20-Gb/s PAM-4 Receiver with Dual-mode Threshold Voltage Adaptation using a Time-based LSB Decoder2
BTI Tolerant Clock Tree Synthesis using LP-based Supply Voltage Alignment2
A Secure Scan Design based on Scan Scrambling by Pseudorandom Values and Circuit Itself2
1.8 mW, 4-8 GHz Bandwidth Mixer with Bleeding Transistors for Superconducting Qubit Read-out2
A Sound Activity Monitor with 96.3 μs Wake-up Time and 2.5 μW Power Consumption2
Charge Trap Flash structure with Feedback Field Effect Transistor for Processing in Memory2
A 0.13 μm CMOS UWB Radar Receiver Front-end with Differential Error-correction and Feedback Gain via Back-to-back Regeneration and Bandwidth Staggering2
Synaptic Device based on Resistive Switching Memory using Single-walled Carbon Nanotubes2
CMOS Nonmagnetic Circulator and Band-Selection Balun-Low Noise Amplifier with RF Self-Interference Cancellation for Advanced In-Band Full-Duplex Transceiver2
Analysis of the Switching Mechanism of Hafnium Oxide Layer with Nanoporous Structure by RF Sputtering2
Efficient Partially-parallel NTT Processor for Lattice-based Post-quantum Cryptography2
Analysis of High Temperature Characteristics of Double Gate Feedback Field Effect Transistor2
Deep Learning Segmentation Modeling for SiN, SiO<SUB>2</SUB> Film Deposition Process Defect of High Bandwidth Memory2
Sub-6 GHz Noise-cancelling Balun-LNTA with Dual-band Q-enhanced LC Notch Filter for 5G New Radio Cellular Applications2
HLS-based HW/SW Co-design and Hybrid HLS-RTL Design for Post-Quantum Cryptosystem1
A Low-power Incremental Delta-sigma ADC with Adaptive Biasing for CMOS Image Sensors1
A Compact 6-bit Phase Shifter in 65 nm RF CMOS Technology for ISM Band1
A Spread Spectrum Clock Generator with Dual-tone Hershey-Kiss Modulation Profile1
4.8-7.2 GHz Low-power Balun-LNA Employing Local Feedback g<sub>m</sub>-boosting and Current-bleeding Techniques for Wi-Fi 802.11be Applications1
Electrical Performances of GaN-based Vertical Trench MOSFETs with Cylindrical and Hexagonal Structure1
Fault-tolerant GEMM Acceleratorbased on Microarchitectural Fault Analysis for Resource-constrained Devices1
Measurement and Characterization of Unstable Pixels of Long-wavelength HgCdTe Infrared Focal Plane Array1
High-precision Resistance Modeling for 3D Hybrid Bonding with Contact Resistance Integration1
Research of Quantized Current Effect with Work Function Variation in Tunnel-field Effect Transistor1
A High Power Supply Rejection and Fast-transient LDO with Feed-forward Compensation using Current Sensing Technique1
A 28 Gb/s Receiver Front-end Capable of Receiving Wide Range Current Signal in 65 nm CMOS1
Multi-gate BCAT Structure and Select Word-line Driver in DRAM for Reduction of GIDL1
2 Lanes × 2.65-6.4 Gb/s Scalable IO Transceiver with Delay Compensation Technique in 65 nm CMOS Process1
Reliable Oscillatory Neural Network Utilizing a Thermally Stable Single Transistor-based Oscillator1
A 99.93% Peak Current Efficiency Digital-LDO using Single VCO With Dual Frequency Gain Control1
Surface Stoichiometry Dependence of Ambipolar SiGe Tunnel Field-effect Transistors and Its Effect on the Transient Performance Improvement1
Effect of Work-function Variation on Transfer Characteristics and Memory Performances for Gate-all-around JLFET based Capacitorless DRAM1
A 39.8% Locking Range Injection-locked Quadrature Voltage-controlled Oscillator using Fourth-order Resonator1
Electrostatic Force Simulation Comparison of Tilted Plate Actuator and Conventional Actuator1
Exploring CXL-SSD Challenges on Cache Underutilization1
A 10 Gb/s MIPI D-PHY Receiver with Auto-skew Calibration Circuit using Random Data1
Design of IEEE 1500-compatible Test access mechanism for Tile-based AI semiconductor with Layout Mirroring1
Research on Sensor Functionality of Next-generation Intelligent Semiconductor Devices using Ga₂O₃-based UV-C Detector Under Commercial Conditions1
A 4.5-to-14 GHz PLL-based Clock Driver with Wide-range 3-shaped LC-VCOs for GDDR6 DRAM Test1
Reducing Communication Overheads in MD Simulations: A Novel Floating-point Data Compression Approach1
Wireless System Miniaturization Solutions for Ingestible Sensors1
An Extensive PUF of Bistable Rings Feed-forward Chains with Lightweight Secure Architecture for Enhanced ML Attack Resistance1
A Comprehensive Review on High-efficiency RF-DC Converter for Energy Harvesting Applications1
FPGA-based SPI Module System Implementation for Various DPS Evaluations in ATE1
Schottky Contact-induced Hump Phenomenon by Bias and Optical Stresses in Amorphous Oxide Thin Film Transistor1
A Second-order 8.3-MHz BW Noise-shaping SAR ADC Using Shared Amplifier for Lossless Switched-capacitor Integration1
An 11-bit 160-MS/s Non-binary C-based SAR ADC with a Partially Monotonic Switching Scheme1
A 232.2nW Segmented Curvature Compensation Sub-BGR with Bandgap Core Reusing1
Quantitative Analysis of Channel Width Effects on Electrical Performance Degradation of Top-gate Self-aligned Coplanar IGZO Thin-film Transistors under Self-heating Stresses1
A Digital FLL-based Sub-harmonically Injection-locked PLL with Resolution-multiplied TDC for Frequency Offset Cancellation1
Vertical Double-gate SiC/Si/SiC Quantum-well 1T DRAM and Its High-temperature Performances1
Analysis and Prediction of Nanowire TFET’s Work Function Variation1
Radiation Tolerant by Design 12-transistor Static Random Access Memory1
A 262 MHz Narrow Band RF Transceiver for Korean M-Bus Smart Metering Service1
Optimization of Dual-workfunction Line Tunnel Field-effect Transistor with Island Source Junction1
Optimization of FinFET’s Fin Width and Height with Self-heating Effect1
A 0.1-3 GHz Wide Bandwidth Ring VCO Fractional-N PLL with Phase Interpolator in 8 nm FinFET CMOS1
A Self-aligned Process for Simultaneous Fabrication of Short Channel and Spacer in Semiconductor Devices1
Reduction of the Pass Gate Effect with a Spherical Shallow Trench Isolation in the BCAT Structure1
Spectral Stability Improvement by Controlling the Spatial Distribution of Excitons in Solution-processed Organic Light-emitting Diodes1
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