IEEE Embedded Systems Letters

Papers
(The TQCC of IEEE Embedded Systems Letters is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-08-01 to 2025-08-01.)
ArticleCitations
Fictitious Play Game Theory for Server Deployment Optimization in Edge-Fog Environments63
A New Fast Convergence Speed Q-APL Algorithm for Active Noise Control Applied to Airplane Seats55
Design of a Hardware-Efficient Approximate 4-2 Compressor for Multiplications in Image Processing33
EnHDC: Ensemble Learning for Brain-Inspired Hyperdimensional Computing30
Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor27
HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption26
Wearable Device to Monitor Sheep Behavior23
SecCAN: An Extended CAN Controller With Embedded Intrusion Detection23
IEEE Embedded Systems Letters Publication Information22
CAAM: Compressor-Based Adaptive Approximate Multiplier for Neural Network Applications22
IEEE Embedded Systems Letters Publication Information19
[Blank page]18
Virtually Contiguous Memory Allocation in Embedded Systems: A Performance Analysis17
Predicting Failures in Embedded Systems Using Long Short-Term Inference17
Table of Contents17
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs17
Design of Tri-Band Bandpass Filter Using Modified X-Shaped Structure for IoT-Based Wireless Applications15
Vector Accelerator Unit for Caravel15
TENDRA: Targeted Endurance Attack on STT-RAM LLC15
Implementation in FPGA of Alternative Modulation Strategy for Energy Balancing Purposes15
CollectiveHLS: Ultrafast Knowledge-Based HLS Design Optimization14
Design Space Exploration of FPGA-Based System With Multiple DNN Accelerators14
EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems13
A Quad-Redundant PLC Architecture for Cyber-Resilient Industrial Control Systems13
Evolutionary Recurrent Neural Architecture Search12
Acceleration of an Optimized Kvazaar All Intra Prediction on Embedded Systems Based on the Directional Texture Complexity12
Weak PUF-Based Variable Latency Obfuscation Technique for ML-Attack Resilient Arbiter PUFs11
FPGA-Based RF Signal Generator for Radar Applications11
MetaTinyML: End-to-End Metareasoning Framework for TinyML Platforms11
A Provably Secure Scheme to Prevent Master Key Recovery by Fault Attack on AES Hardware11
Editorial10
Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection10
Global Voltage Scaling Across Multiple Cores for Real-Time Workloads10
Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes10
On the Retiming for Register Minimization by Means of Breadth Coefficients Matrix10
Efficient Partial Weight Update Techniques for Lightweight On-Device Learning on Tiny Flash-Embedded MCUs10
Toward Precision-Aware Safe Neural-Controlled Cyber–Physical Systems9
On Automating FPGA Design Build Flow Using GitLab CI9
An Efficient VCD Parser for Dynamic Power Estimation of Digital Integrated Circuits9
ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication9
Using Intermittent Chaotic Clocks to Secure Cryptographic Chips8
MQTT-Based Adaptive Estimation Over Distributed Network Using Raspberry Pi Pico W8
LION: A Learned Index for On-Device Sensor Data Management8
Software Synthesis From High-Level Specification for Swarm Robotic Applications8
Grey Wolf Optimization Algorithm for Embedded Adaptive Filtering Applications8
Development of a Miniaturized Testing System for Resonant Frequency Difference Detection for Delay Line Surface Acoustic Wave Devices8
Editorial7
Seeding Algorithm for Bipolar Stochastic Computing for Polynomial Approximations7
Flexible Active–Passive and Push–Pull Protocols7
Cometes: Cross-Device Mapping for Energy and Time-Aware Deployment on Edge Infrastructures7
Methodology for CNN Implementation in FPGA-Based Embedded Systems7
CADEN: Compression-Assisted Adaptive Encoding to Improve Lifetime of Encrypted Nonvolatile Main Memories7
Hardware Deployable Edge-AI Solution for Prescreening of Oral Tongue Lesions Using TinyML on Embedded Devices7
Improving Memory Utilization in Convolutional Neural Network Accelerators7
Table of contents7
Impulsive Noise Estimator With Minimization Methods (INEMM) on Software6
ARTS: A Framework for AI-Rooted IoT System Design Automation6
Toward Dynamism in Distributed Lingua Franca Programs6
Adversarial Attack Bypass by Stochastic Computing6
Exception Coverage on Automotive Processors6
Editorial6
Hardware Trojan Detection Method Against Balanced Controllability Trigger Design6
Gradual Channel Estimation Method for TLC NAND Flash Memory6
Embedded System for the Simultaneous Study of SAHS and Cardiac Arrhythmia6
Novel Toolset for Efficient Hardwired Micro-Op Translation in Embedded Microarchitectures6
Privacy-Preserving Anomaly Detection With Homomorphic Encryption for Industrial Control Systems in Critical Infrastructure6
TinyMo: Graph-Level Memory Optimizer for Tiny Machine Learning6
Auto Digit Selection for Most Significant Digit First Multiplication6
A High-Performance Hardware Accelerator for ECC in GF(p) Over Generic Weierstrass Curves6
Optimizing Learned Bloom Filters: How Much Should Be Learned?6
Aging-Aware Parallel Execution6
DATA: Throughput and Deadline-Aware Genetic Approach for Task Scheduling in Fog Networks5
On-Device Personalization for Human Activity Recognition on STM325
Differentiable Slimming for Memory-Efficient Transformers5
Time-Sensitive Networking in Low Latency Cyber-Physical Systems5
Corrections to “FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement”5
Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs5
A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip5
Methodology for Formal Verification of Hardware Safety Strategies Using SMT5
A Remote Control System for Emergency Ventilators During SARS-CoV-25
IEEE Embedded Systems Letters Publication Information5
Task Sequencing in Frame-Based CPS5
Secure Protocol for Remote Testing Critical Systems Over Public Networks Using Zero-knowledge Proofs5
IEEE Embedded Systems Letters Publication Information5
Automatic Generation of Reconfiguration Blueprints for IMA Systems Using Reinforcement Learning5
Hardware–Software Co-Optimization of Long-Latency Stochastic Computing5
Table of Contents4
Automatic Fecal Eggs Counting in Ruminants Using Xilinx DPU4
Efficient Leading Zero Count (LZC) Implementations for Xilinx FPGAs4
No-Multiplication Deterministic Hyperdimensional Encoding for Resource-Constrained Devices4
FedTinyWolf—A Memory Efficient Federated Embedded Learning Mechanism4
Automated Parasite Control System Prototype Through Capsule Dosage Based on Image Processing4
Table of Contents4
Efficient Embedded System for Small Object Detection: A Case Study on Floating Debris in Environmental Monitoring4
Common Subexpression-Based Compression and Multiplication of Sparse Constant Matrices4
Arc Model and DDG: Deadlock Avoidance and Detection in Torus NoC4
A Sample-Based, Multi-Stage Machine Learning Pipeline for Scalable IoT Threat Detection4
Practical and Efficient PUF-Based Protocol for Authentication and Key Agreement in IoT4
Analytical Performance Modeling of NoCs under Priority Arbitration and Bursty Traffic4
Wireless Tag Sensor Network for Apnea Detection and Posture Recognition Using LSTM4
Three-Stage Power Supply System Model for a Wearable IoT Device for COVID-19 Patients4
MUSIC-Lite: Efficient MUSIC Using Approximate Computing: An OFDM Radar Case Study4
ViTSen: Bridging Vision Transformers and Edge Computing With Advanced In/Near-Sensor Processing4
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers4
Table of Contents4
Functional Validation of the RISC-V Unlimited Vector Extension4
Implications of Various Preemption Configurations in TSN Networks4
High Level Synthesis Based Forensic Watermarking of Hardware IPs using IP Vendor’s DNA Signature3
Investigation of Security Vulnerabilities in NVM-Based Persistent TinyML Hardware3
Design, Construction and Measurement of Branchline Coupler3
Design of AI-Powered Hybrid Control Algorithm of Robot Vehicle for Enhanced Driving Performance3
A Novel Insight Into the Vulnerability of DDR4 DRAM Cells Across Multiple Hammering Settings3
A Multidimensional Hardware Trojan Design Platform to Enhance Hardware Security3
Design and Implementation of an Embedded Cardiorespiratory Monitoring System for Wheelchair Users3
Data Communication for Low Resources IoT Devices: RS485 Over Electrical Wires3
TVI PUF: A Temperature and Voltage Independent PUF With High Resistance to Modeling Attacks3
Renée: New Life for Old Phones3
A Low-Cost Embedded System to Support Broadcasting Emergency Messages Through FM Radio Stations3
Effects of Runtime Reconfiguration on PUFs Implemented as FPGA-Based Accelerators3
Table of Contents3
Research on Cyclic Queuing and Forwarding With Preemption in Time-Sensitive Networking3
Approximate Row-Merging-Based Multipliers for Neural Network Acceleration on FPGAs3
An Area and Energy Efficient Serial-Multiplier3
A Quantitative Analysis and Optimization on the Cache Behavior Influenced by Literal Pools3
A Gauge Meter Reader Edge Device Based on Computer Vision and Deep Learning3
Diagnostic Accuracy of Smartphone-Connected Electrophysiological Biosensors for Prediction of Blood Glucose Level in a Type-2 Diabetic Patient Using Machine Learning: A Pilot Study3
A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications3
ArKANe: Accelerating Kolmogorov-Arnold Networks on Reconfigurable Spatial Architectures3
Reliable Methodology to FPGA Design Verification and Noise Analysis for Digital Lock-In Amplifiers3
Boosting AES Intrinsic Resilience Using Split SubBytes Round Function Against Power Attacks3
Real-Time Tomato Quality Assessment Using Hybrid CNN-SVM Model3
Low-Power Compressor-Based Approximate Multipliers With Error Correcting Module3
CNN Workloads Characterization and Integrated CPU–GPU DVFS Governors on Embedded Systems3
Hardware-in-the-Loop Simulation of an On-Board Energy-Driven Scheduling Algorithm for CubeSats3
CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs3
0.058479070663452