IEEE Embedded Systems Letters

Papers
(The TQCC of IEEE Embedded Systems Letters is 3. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2021-06-01 to 2025-06-01.)
ArticleCitations
HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption60
Wearable Device to Monitor Sheep Behavior51
Fictitious Play Game Theory for Server Deployment Optimization in Edge-Fog Environments33
A New Fast Convergence Speed Q-APL Algorithm for Active Noise Control Applied to Airplane Seats29
Design of a Hardware-Efficient Approximate 4-2 Compressor for Multiplications in Image Processing26
EnHDC: Ensemble Learning for Brain-Inspired Hyperdimensional Computing25
CAAM: Compressor-Based Adaptive Approximate Multiplier for Neural Network Applications23
SecCAN: An Extended CAN Controller With Embedded Intrusion Detection23
Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor21
IEEE Embedded Systems Letters Publication Information20
IEEE Embedded Systems Letters Publication Information20
Table of Contents17
Virtually Contiguous Memory Allocation in Embedded Systems: A Performance Analysis17
[Blank page]17
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs16
Predicting Failures in Embedded Systems Using Long Short-Term Inference15
Implementation in FPGA of Alternative Modulation Strategy for Energy Balancing Purposes15
Design of Tri-Band Bandpass Filter Using Modified X-Shaped Structure for IoT-Based Wireless Applications15
TENDRA: Targeted Endurance Attack on STT-RAM LLC14
Design Space Exploration of FPGA-Based System With Multiple DNN Accelerators13
Vector Accelerator Unit for Caravel13
EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems12
Evolutionary Recurrent Neural Architecture Search12
CollectiveHLS: Ultrafast Knowledge-Based HLS Design Optimization12
On Automating FPGA Design Build Flow Using GitLab CI11
A Quad-Redundant PLC Architecture for Cyber-Resilient Industrial Control Systems11
MetaTinyML: End-to-End Metareasoning Framework for TinyML Platforms11
Software Synthesis From High-Level Specification for Swarm Robotic Applications11
Acceleration of an Optimized Kvazaar All Intra Prediction on Embedded Systems Based on the Directional Texture Complexity11
Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection10
On the Retiming for Register Minimization by Means of Breadth Coefficients Matrix10
Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes10
Efficient Partial Weight Update Techniques for Lightweight On-Device Learning on Tiny Flash-Embedded MCUs10
Automatic Generation of Heterogeneous SoC Architectures With Secure Communications10
A Provably Secure Scheme to Prevent Master Key Recovery by Fault Attack on AES Hardware10
Editorial10
Global Voltage Scaling Across Multiple Cores for Real-Time Workloads9
Development of a Miniaturized Testing System for Resonant Frequency Difference Detection for Delay Line Surface Acoustic Wave Devices8
Toward Precision-Aware Safe Neural-Controlled Cyber–Physical Systems8
An Efficient VCD Parser for Dynamic Power Estimation of Digital Integrated Circuits8
Methodology for CNN Implementation in FPGA-Based Embedded Systems7
MQTT-Based Adaptive Estimation Over Distributed Network Using Raspberry Pi Pico W7
Using Intermittent Chaotic Clocks to Secure Cryptographic Chips7
Cometes: Cross-Device Mapping for Energy and Time-Aware Deployment on Edge Infrastructures7
Grey Wolf Optimization Algorithm for Embedded Adaptive Filtering Applications7
Hardware Deployable Edge-AI Solution for Prescreening of Oral Tongue Lesions Using TinyML on Embedded Devices7
Seeding Algorithm for Bipolar Stochastic Computing for Polynomial Approximations7
ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication7
Editorial7
Optimizing Learned Bloom Filters: How Much Should Be Learned?6
CADEN: Compression-Assisted Adaptive Encoding to Improve Lifetime of Encrypted Nonvolatile Main Memories6
Adversarial Attack Bypass by Stochastic Computing6
Novel Toolset for Efficient Hardwired Micro-Op Translation in Embedded Microarchitectures6
Improving Memory Utilization in Convolutional Neural Network Accelerators6
Gradual Channel Estimation Method for TLC NAND Flash Memory6
Exception Coverage on Automotive Processors6
A High-Performance Hardware Accelerator for ECC in GF(p) Over Generic Weierstrass Curves6
Table of contents6
Flexible Active–Passive and Push–Pull Protocols6
Toward Dynamism in Distributed Lingua Franca Programs6
Embedded System for the Simultaneous Study of SAHS and Cardiac Arrhythmia6
ARTS: A Framework for AI-Rooted IoT System Design Automation5
Auto Digit Selection for Most Significant Digit First Multiplication5
TinyMo: Graph-Level Memory Optimizer for Tiny Machine Learning5
IEEE Embedded Systems Letters Publication Information5
Methodology for Formal Verification of Hardware Safety Strategies Using SMT5
Impulsive Noise Estimator With Minimization Methods (INEMM) on Software5
Aging-Aware Parallel Execution5
Privacy-Preserving Anomaly Detection With Homomorphic Encryption for Industrial Control Systems in Critical Infrastructure5
A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip5
Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs5
Editorial5
Task Sequencing in Frame-Based CPS5
Hardware Trojan Detection Method Against Balanced Controllability Trigger Design5
DATA: Throughput and Deadline-Aware Genetic Approach for Task Scheduling in Fog Networks5
On-Device Personalization for Human Activity Recognition on STM325
Practical and Efficient PUF-Based Protocol for Authentication and Key Agreement in IoT5
FedTinyWolf—A Memory Efficient Federated Embedded Learning Mechanism4
No-Multiplication Deterministic Hyperdimensional Encoding for Resource-Constrained Devices4
Accelerated Updating Mechanisms for FPGA-Based Ternary Content-Addressable Memory4
Automatic Generation of Reconfiguration Blueprints for IMA Systems Using Reinforcement Learning4
A Sample-Based, Multi-Stage Machine Learning Pipeline for Scalable IoT Threat Detection4
Hardware–Software Co-Optimization of Long-Latency Stochastic Computing4
Functional Validation of the RISC-V Unlimited Vector Extension4
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers4
Analytical Performance Modeling of NoCs under Priority Arbitration and Bursty Traffic4
IEEE Embedded Systems Letters Publication Information4
Efficient Embedded System for Small Object Detection: A Case Study on Floating Debris in Environmental Monitoring4
A Remote Control System for Emergency Ventilators During SARS-CoV-24
IEEE Embedded Systems Letters Publication Information4
Time-Sensitive Networking in Low Latency Cyber-Physical Systems4
Three-Stage Power Supply System Model for a Wearable IoT Device for COVID-19 Patients4
Corrections to “FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement”4
Automated Parasite Control System Prototype Through Capsule Dosage Based on Image Processing4
Table of Contents4
Efficient Leading Zero Count (LZC) Implementations for Xilinx FPGAs4
Differentiable Slimming for Memory-Efficient Transformers4
Wireless Tag Sensor Network for Apnea Detection and Posture Recognition Using LSTM4
Implications of Various Preemption Configurations in TSN Networks4
Table of Contents4
Arc Model and DDG: Deadlock Avoidance and Detection in Torus NoC3
A Low-Cost Embedded System to Support Broadcasting Emergency Messages Through FM Radio Stations3
ArKANe: Accelerating Kolmogorov-Arnold Networks on Reconfigurable Spatial Architectures3
FPGA Design of Elliptic Curve Cryptosystem (ECC) for Isomorphic Transformation and EC ElGamal Encryption3
CNN Workloads Characterization and Integrated CPU–GPU DVFS Governors on Embedded Systems3
Table of Contents3
Diagnostic Accuracy of Smartphone-Connected Electrophysiological Biosensors for Prediction of Blood Glucose Level in a Type-2 Diabetic Patient Using Machine Learning: A Pilot Study3
Hardware-in-the-Loop Simulation of an On-Board Energy-Driven Scheduling Algorithm for CubeSats3
Common Subexpression-Based Compression and Multiplication of Sparse Constant Matrices3
Data Communication for Low Resources IoT Devices: RS485 Over Electrical Wires3
A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications3
Design, Construction and Measurement of Branchline Coupler3
A Multidimensional Hardware Trojan Design Platform to Enhance Hardware Security3
Design and Implementation of an Embedded Cardiorespiratory Monitoring System for Wheelchair Users3
A Gauge Meter Reader Edge Device Based on Computer Vision and Deep Learning3
High Level Synthesis Based Forensic Watermarking of Hardware IPs using IP Vendor’s DNA Signature3
Automatic Fecal Eggs Counting in Ruminants Using Xilinx DPU3
CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs3
A Quantitative Analysis and Optimization on the Cache Behavior Influenced by Literal Pools3
Research on Cyclic Queuing and Forwarding With Preemption in Time-Sensitive Networking3
Investigation of Security Vulnerabilities in NVM Based Persistent TinyML Hardware3
An Area and Energy Efficient Serial-Multiplier3
Renée: New Life for Old Phones3
TVI PUF: A Temperature and Voltage Independent PUF With High Resistance to Modeling Attacks3
ViTSen: Bridging Vision Transformers and Edge Computing With Advanced In/Near-Sensor Processing3
MUSIC-Lite: Efficient MUSIC Using Approximate Computing: An OFDM Radar Case Study3
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