IEEE Embedded Systems Letters

Papers
(The TQCC of IEEE Embedded Systems Letters is 4. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-05-01 to 2026-05-01.)
ArticleCitations
Wearable Device to Monitor Sheep Behavior77
Fictitious Play Game Theory for Server Deployment Optimization in Edge–Fog Environments30
Design of a Hardware-Efficient Approximate 4-2 Compressor for Multiplications in Image Processing29
Constraint-Scheduled Bayesian Optimization for Software-Hardware Co-Optimization on HDnn-PIM27
IEEE Embedded Systems Letters Publication Information26
EnHDC: Ensemble Learning for Brain-Inspired Hyperdimensional Computing25
A New Fast Convergence Speed q -APL Algorithm for Active Noise Control Applied to Airplane Seats25
HASTE: Software Security Analysis for Timing Attacks on Clear Hardware Assumption22
SecCAN: An Extended CAN Controller With Embedded Intrusion Detection21
XOR-TOPK : Efficient Top-K Selection Hardware Engine Based on Bitwise XOR Operation21
Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor20
CAAM: Compressor-Based Adaptive Approximate Multiplier for Neural Network Applications19
IEEE Embedded Systems Letters Publication Information18
IEEE Embedded Systems Letters Publication Information18
Implementation in FPGA of Alternative Modulation Strategy for Energy Balancing Purposes18
Virtually Contiguous Memory Allocation in Embedded Systems: A Performance Analysis17
Table of Contents16
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs15
Design of Tri-Band Bandpass Filter Using Modified X-Shaped Structure for IoT-Based Wireless Applications15
No HDL, No Problem: HLS-Generated Power Wasters for Fault Injection in Cloud FPGAs15
EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems14
CollectiveHLS: Ultrafast Knowledge-Based HLS Design Optimization14
TENDRA: Targeted Endurance Attack on STT-RAM LLC13
GRU-RVCIM: Efficient Implementation of Gated Recurrent Unit in RISC-V - Compute In Memory co-designed for Edge Applications12
Acceleration of an Optimized Kvazaar All Intra Prediction on Embedded Systems Based on the Directional Texture Complexity12
Weak PUF-Based Variable Latency Obfuscation Technique for ML-Attack Resilient Arbiter PUFs11
FPGA-Based RF Signal Generator for Radar Applications11
MetaTinyML: End-to-End Metareasoning Framework for TinyML Platforms11
Vector Accelerator Unit for Caravel10
Toward Precision-Aware Safe Neural-Controlled Cyber–Physical Systems10
On the Retiming for Register Minimization by Means of Breadth Coefficients Matrix10
Value-Aware Real-Time Scheduling for Intelligent Transportation Systems10
Editorial10
Efficient Partial Weight Update Techniques for Lightweight On-Device Learning on Tiny Flash-Embedded MCUs10
An Efficient VCD Parser for Dynamic Power Estimation of Digital Integrated Circuits10
A Provably Secure Scheme to Prevent Master Key Recovery by Fault Attack on AES Hardware9
MQTT-Based Adaptive Estimation Over Distributed Network Using Raspberry Pi Pico W9
ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication9
Software Synthesis From High-Level Specification for Swarm Robotic Applications9
An Efficient Iterative Beam Search for Human–Robot Collaborative Assembly Line Balancing9
Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection9
Grey Wolf Optimization Algorithm for Embedded Adaptive Filtering Applications8
A Reconfigurable Low-Latency Posit MAC Unit with Mixed Precision8
Seeding Algorithm for Bipolar Stochastic Computing for Polynomial Approximations8
On Automating FPGA Design Build Flow Using GitLab CI8
IEEE Embedded Systems Letters Publication Information8
Editorial8
Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes8
Development of a Miniaturized Testing System for Resonant Frequency Difference Detection for Delay Line Surface Acoustic Wave Devices8
LION: A Learned Index for On-Device Sensor Data Management8
Cometes: Cross-Device Mapping for Energy and Time-Aware Deployment on Edge Infrastructures8
Global Voltage Scaling Across Multiple Cores for Real-Time Workloads8
Table of Contents7
Using Intermittent Chaotic Clocks to Secure Cryptographic Chips7
Flexible Active–Passive and Push–Pull Protocols7
Instruction-Level Support for Deterministic Dataflow in Real-Time Systems7
A High-Performance Hardware Accelerator for ECC in GF(p) Over Generic Weierstrass Curves7
Hardware Deployable Edge-AI Solution for Prescreening of Oral Tongue Lesions Using TinyML on Embedded Devices7
Methodology for CNN Implementation in FPGA-Based Embedded Systems7
Optimizing Learned Bloom Filters: How Much Should Be Learned?7
Physical Design Exploration of a Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes7
An Embedded RISC-V Vector Processor for Energy-Efficient GNSS Signal Processing and Navigation Computation7
CADEN: Compression-Assisted Adaptive Encoding to Improve Lifetime of Encrypted Nonvolatile Main Memories7
ACSAM: Accuracy-configurable Segmentation-based Approximate Multiplier for Error-resilient Edge-AI Applications7
JugglePAC: A Pipelined Accumulation Circuit7
Exception Coverage on Automotive Processors7
Embedded System for the Simultaneous Study of SAHS and Cardiac Arrhythmia7
Auto Digit Selection for Most Significant Digit First Multiplication6
CSO-TFG: A Configurable Seed-Free On-the-fly Twiddle Factor Generator for NWC-Based NTT/INTT6
TinyMo: Graph-Level Memory Optimizer for Tiny Machine Learning6
On-Device Personalization for Human Activity Recognition on STM326
Privacy-Preserving Anomaly Detection With Homomorphic Encryption for Industrial Control Systems in Critical Infrastructure6
Adversarial Attack Bypass by Stochastic Computing6
Editorial6
A Q-Learning-Based Fault-Tolerant and Congestion-Aware Adaptive Routing Algorithm for Networks-on-Chip6
Beyond BNNs: Design and Acceleration of Sub-Bit Neural Networks Using RISC-V Custom Functional Units6
Novel Toolset for Efficient Hardwired Micro-Op Translation in Embedded Microarchitectures6
FPGA-Optimized Transformer Network Accelerator with Efficient Softmax and Sparsity-Aware Gating6
Impulsive Noise Estimator With Minimization Methods (INEMM) on Software6
DATA: Throughput and Deadline-Aware Genetic Approach for Task Scheduling in Fog Networks6
Hardware Trojan Detection Method Against Balanced Controllability Trigger Design6
ARTS: A Framework for AI-Rooted IoT System Design Automation6
Secure Protocol for Remote Testing Critical Systems Over Public Networks Using Zero-Knowledge Proofs6
Toward Dynamism in Distributed Lingua Franca Programs6
FedTinyWolf—A Memory Efficient Federated Embedded Learning Mechanism5
Time-Sensitive Networking in Low Latency Cyber-Physical Systems5
Methodology for Formal Verification of Hardware Safety Strategies Using SMT5
IEEE Embedded Systems Letters Publication Information5
Table of Contents5
Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs5
Hailo-8L-Accelerated Embedded Framework for Bladder Carcinoma Detection Using Distilled YOLO Models5
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers5
Practical and Efficient PUF-Based Protocol for Authentication and Key Agreement in IoT5
Parallel Optimization of NTT for Kyber Key Encapsulation Mechanism Using GPU-Accelerated Plantard Arithmetic5
Differentiable Slimming for Memory-Efficient Transformers5
Improved Montgomery Modular Multipliers on FPGAs and ASICs5
Corrections to “FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement”5
No-Multiplication Deterministic Hyperdimensional Encoding for Resource-Constrained Devices5
Table of Contents5
Hardware–Software Co-Optimization of Long-Latency Stochastic Computing5
A Sample-Based, Multistage Machine Learning Pipeline for Scalable IoT Threat Detection4
Wireless Tag Sensor Network for Apnea Detection and Posture Recognition Using LSTM4
High-Level Synthesis-Based Forensic Watermarking of Hardware IPs Using IP Vendor’s DNA Signature4
Design, Construction, and Measurement of Branchline Coupler4
Renée: New Life for Old Phones4
A 340- μ W TinyML Using LUT-Based Reservoir Computing on Low-Cost FPGAs4
ViTSen: Bridging Vision Transformers and Edge Computing With Advanced In/Near-Sensor Processing4
Efficient Embedded System for Small Object Detection: A Case Study on Floating Debris in Environmental Monitoring4
A Gauge Meter Reader Edge Device Based on Computer Vision and Deep Learning4
Automated Parasite Control System Prototype Through Capsule Dosage Based on Image Processing4
Three-Stage Power Supply System Model for a Wearable IoT Device for COVID-19 Patients4
QLlama: An FPGA-Based Microscaling Quantization Accelerator for Energy-Efficient Llama2 Inference4
Common Subexpression-Based Compression and Multiplication of Sparse Constant Matrices4
CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs4
CNN Workloads Characterization and Integrated CPU–GPU DVFS Governors on Embedded Systems4
Research on Cyclic Queuing and Forwarding With Preemption in Time-Sensitive Networking4
Arc Model and DDG: Deadlock Avoidance and Detection in Torus NoC4
BLAST: Blockwise Activation Sparsity for Transformers4
TVI PUF: A Temperature- and Voltage-Independent PUF With High Resistance to Modeling Attacks4
Automatic Fecal Eggs Counting in Ruminants Using Xilinx DPU4
A parallel ring streaming dataflow based convolution array architecture for CNN accelerator4
Functional Validation of the RISC-V Unlimited Vector Extension4
A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications4
A Quantitative Analysis and Optimization on the Cache Behavior Influenced by Literal Pools4
Investigation of Security Vulnerabilities in NVM-Based Persistent TinyML Hardware4
A Multidimensional Hardware Trojan Design Platform to Enhance Hardware Security4
SENTINEL: Enhancing Trust and Transparency in IoT Networks Through Graph-Based Data Collection and Blockchain4
MUSIC-Lite: Efficient MUSIC Using Approximate Computing: An OFDM Radar Case Study4
Hardware-in-the-Loop Simulation of an On-Board Energy-Driven Scheduling Algorithm for CubeSats4
Data Communication for Low Resources IoT Devices: RS485 Over Electrical Wires4
Table of Contents4
Reversible Logic-based RO-PUF Architecture with Enhanced Security Against Modeling and EM Side-channel Attacks4
0.068212985992432