IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Papers
(The TQCC of IEEE Journal on Emerging and Selected Topics in Circuits and Systems is 8. The table below lists those papers that are above that threshold based on CrossRef citation counts [max. 250 papers]. The publications cover those that have been published in the past four years, i.e., from 2022-06-01 to 2026-06-01.)
ArticleCitations
Table of Contents74
IEEE Journal on Emerging and Selected Topics in Circuits and Systems information for authors69
IEEE Circuits and Systems Society Information57
System-Technology Co-Optimization Methodology for LLM Accelerators With Advanced Packaging52
WHYPE: A Scale-Out Architecture With Wireless Over-the-Air Majority for Scalable In-Memory Hyperdimensional Computing46
Do We Need 10 bits? Assessing HEVC Encoders for Energy-Efficient HDR Video Streaming45
Time-based 8TD SRAM CIM Macro with Low PVT Sensitivity for Edge Devices42
D-NAT: Data-Driven Non-Ideality Aware Training Framework for Fabricated Computing-In-Memory Macros38
Guest Editorial Unconventional Computing Techniques for Emerging Technology Applications36
A Predictive Approach for Conditional Execution of Memristive Material Implication Stateful Logic Operations36
Introducing IEEE Collabratec35
AM5: Bulk Logic-in-Memory Using MRAM NAND Crossbar32
AppCiP: Energy-Efficient Approximate Convolution-in-Pixel Scheme for Neural Network Acceleration32
Generative Refinement for Low Bitrate Image Coding Using Vector Quantized Residual30
Memristor-Based Light-Weight Transformer Circuit Implementation for Speech Recognizing30
Design and Automation for Quantum Computation and Quantum Technologies29
Programming Weights to Analog In-Memory Computing Cores by Direct Minimization of the Matrix-Vector Multiplication Error29
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information28
IEEE Circuits and Systems Society Information26
IEEE Journal on Emerging and Selected Topics in Circuits and Systems information for authors26
Diffense: Defense Against Backdoor Attacks on Deep Neural Networks With Latent Diffusion24
COIN: Communication-Aware In-Memory Acceleration for Graph Convolutional Networks24
An Optical Tool to Optimize the Output of a Photonic Integrated Chip Architecture23
Guest Editorial: Integrated Devices, Circuits, and Systems for the 6G Era23
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information22
TDC–CiM: Time–to–Digital Converter–Based Resonant Compute–in–Memory for INT8 CNNs with Layer–Optimized SRAM Mapping22
CDSTTN: A Data Imputation Method for Cyber-Physical Systems by Causal Dense Spatial–Temporal Transformer Network22
Compact Transverse-Resonance Low-Pass Filter With Wide Stop-Band Rejection Implemented in Gallium Arsenide Technology22
A Universal Multistable Memristor Feedback Scheme for Designing Multi-scroll/wing Chaotic Systems Without Equilibria21
CBP-QSNN: Spiking Neural Networks Quantized Using Constrained Backpropagation21
Stochastic Synchronization of Semi-Markovian Switching Cyber-Physical Impulsive Complex Networks via Dynamic Event-Triggered SMC20
Delta Sigma Modulator-Based Dividers for Accurate and Low Latency Stochastic Computing Systems20
Mott Memristors and Neuronal Ion Channels: A Qualitative Analysis19
Hardware Efficient Successive-Cancellation Polar Decoders Using Approximate Computing19
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information19
Intermittent Fault Diagnosis and Prognosis for Steer-by-Wire System Using Composite Degradation Model18
A 185-to-240 GHz SiGe Power Amplifier Using Non-Zero Base-Impedances for Power Gain and Output Power Optimizations18
Domain-Specific Quantum Architecture Optimization18
Corrections to “Digital implementation of Radial Basis Function Neural Networks Based on Stochastic Computing” [Mar 23 257-269]18
GenPolar: Generative AI-Aided Complexity Reduction for Polar SCL Decoding17
Testing Scalable Bell Inequalities for Quantum Graph States on IBM Quantum Devices17
F3: An FPGA-Based Transformer Fine-Tuning Accelerator With Flexible Floating Point Format16
Adaptive Two-Range Quantization and Hardware Co-Design for Large Language Model Acceleration16
FVIFormer: Flow-Guided Global-Local Aggregation Transformer Network for Video Inpainting16
Multi-Tasking Memcapacitive Networks16
Design of Processing-in-Memory With Triple Computational Path and Sparsity Handling for Energy-Efficient DNN Training16
Identification of Influential Nodes in Complex Networks With Degree and Average Neighbor Degree16
Real-Time Quality- and Energy-Aware Bitrate Ladder Construction for Live Video Streaming16
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information16
Generation Method of Multi-Regional Photovoltaic Output Scenarios-Set Using Conditional Generative Adversarial Networks15
Table of Contents14
Guest Editorial 2.5D/3D Chiplet Circuits and Systems, EDA, Advanced Packaging, and Test—Part I14
IEEE Circuits and Systems Society Information14
Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic Primitives13
Stealing the Invisible: Unveiling Pre-Trained CNN Models through Adversarial Examples and Timing Side-Channels13
PAWN: Programmed Analog Weights for Non-Linearity Optimization in Memristor-Based Neuromorphic Computing System13
Exploring Compute-in-Memory Architecture Granularity for Structured Pruning of Neural Networks13
A Through Silicon Via (TSV) Architecture of the Bumpless Build Cube (BBCube) for Stacked Memory Devices13
A Highly-Scalable Deep-Learning Accelerator With a Cost-Effective Chip-to-Chip Adapter and a C2C-Communication-Aware Scheduler13
IEEE Journal on Emerging and Selected Topics in Circuits and Systems information for authors12
Guest Editorial Generative Artificial Intelligence Compute: Algorithms, Implementations, and Applications to CAS12
p-Harrow: Optical Logic Synthesis for Efficiency Optimization via Partial Harmonic Mean and Integer Partition12
TetrisG-SDK: Efficient Convolutional Layer Mapping with Adaptive Windows and Grouped Convolutions for Fast In-Memory Computing12
Stochastic Computing Design and Implementation of a Sound Source Localization System12
SAFET-HI: Secure Authentication-Based Framework for Encrypted Testing in Heterogeneous Integration12
TechRxiv: Share Your Preprint Research with the World!12
Survey on Visual Signal Coding and Processing With Generative Models: Technologies, Standards, and Optimization12
Guest Editorial Circuits and Systems for Industry X.0 Applications11
On Fidelity-Oriented Entanglement Distribution for Quantum Switches11
Delay-Constrained GNR Routing With CNT-Via Insertion in Nano-Scale Designs11
Enhancing Image Quality by Reducing Compression Artifacts Using Dynamic Window Swin Transformer11
Adaptive Security Control Against False Data Injection Attacks in Cyber-Physical Systems11
Hardware-Robust In-RRAM-Computing for Object Detection11
Xbar-Partitioning: A Practical Way for Parasitics and Noise Tolerance in Analog IMC Circuits11
TechRxiv: Share Your Preprint Research with the World!11
Depth-First: A Deterministic and Scalable NoC Routing Protocol for 3.5D Packaged Architectures10
Parameter Reduction of Kernel-Based Video Frame Interpolation Methods Using Multiple Encoders10
Tempo-CIM: A RRAM Compute-in-Memory Neuromorphic Accelerator With Area-Efficient LIF Neuron and Split-Train-Merged-Inference Algorithm for Edge AI Applications10
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information10
A Stochastic Computing Sigma-Delta Adder Architecture for Efficient Neural Network Design10
TechRxiv: Share Your Preprint Research with the World!10
Investigating Register Cache Behavior: Implications for CUDA and Tensor Core Workloads on GPUs10
IEEE Journal on Emerging and Selected Topics in Circuits and Systems10
Guest Editorial Energy-Efficient Optical Communications, Optical Integrated Circuits, and Signal Processing10
Systematical Evasion from Learning-based Microarchitectural Attack Detection Tools10
Stabilization and Non-Weighted L 2 Gain Analysis of Switched Systems With Distributed Delay Under Asynchronous Event-Triggered Control10
Metamaterial-Enabled Ultrawideband mmWave Antenna-in-Package Using Heterogeneously-Integrated Silicon IPD and HDI-PCB for B5G/ 6G Applications9
Enabling Energy-Efficient In-Memory Computing With Robust Assist-Based Reconfigurable Sense Amplifier in SRAM Array9
Introducing IEEE Collabratec9
LightRot: A Light-Weighted Rotation Scheme and Architecture for Accurate Low-Bit Large Language Model Inference9
Heterogeneous Integration in Co-Packaged Optics9
STT-BNN: A Novel STT-MRAM In-Memory Computing Macro for Binary Neural Networks9
HALO: Communication-Aware Heterogeneous 2.5-D System for Energy-Efficient LLM Execution at Edge9
A Reconfigurable Spatial Architecture for Energy-Efficient Inception Neural Networks9
End-to-End Acceleration of Generative Models With Runtime Regularized KV Cache Management9
Design and Analysis of 3D Integrated Folded Ferro-Capacitive Crossbar Array (FC²A) for Brain-Inspired Computing System9
Benchmarking DNN Mapping Methods for the in-Memory Computing Accelerators9
IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information8
Robust-by-Design Silicon Photonic Mach–Zehnder Interferometers Under Fabrication Nonuniformities8
BioNN: Bio-Mimetic Neural Networks on Hardware Using Nonlinear Multi-Timescale Mixed-Feedback Control for Neuromodulatory Bursting Rhythms8
TechRxiv: Share Your Preprint Research with the World!8
A 299–315-GHz Dual-Band Radiator Array With Cascaded Transmission Line-Based Feedback Network for Phase Noise Improvement8
A Novel Hypercube-Based Heuristic for Quantum Boolean Circuit Synthesis8
All-optical AND Logic Gate With High Extinction Ratio for Neural Network Hardware Implementation8
Stuck-at-Fault Immunity Enhancement of Memristor-Based Edge AI Systems8
CTT-Based Scalable Neuromorphic Architecture8
Optimizations for a Current-Controlled Memristor- Based Neuromorphic Synapse Design8
EEG-Based Multi-Frequency Multilayer Network for Exploring the Brain State Evolution Underlying Motor Imagery8
Synchronization Stability of the MMC-Connected Wind Farm Under Severe Asymmetrical Faults8
Monolithically Integrated Transimpedance Accumulators for Analog In-Memory Computing Based on Dual-Gate Metal-Oxide TFTs8
Low Latency Variational Autoencoder on FPGAs8
Deep-Learning Based Power System Events Detection Technology Using Spatio-Temporal and Frequency Information8
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