IEEE Design & Test

Article	Citations
Linear Algorithmic Checksums for Deep Neural Network Error Detection: Fundamentals & Recent Advancements	45
Report on the 2024 Embedded Systems Week (ESWEEK)	40
Top Picks in Hardware and Embedded Security 2022	38
Table of Contents	37
IEEE Foundation	36
IEEE Membership	34
Compact and High-Performing Five-Stage Pipeline RISC-V Microprocessor Designed for IoT Applications	27
IEEE Membership	26
Front Cover	25
SCA Strikes Back: Reverse-Engineering Neural Network Architectures Using Side Channels	23
Front Cover	23
Table of Contents	19
On the Mitigation of Read Disturbances in Neuromorphic Inference Hardware	15
Autonomous Systems Design: Charting a New Discipline	15
Machine Learning for CAD/EDA: The Road Ahead	15
IEEE Design & Test Publication Information	15
Guest Editors’ Introduction: Stochastic Computing for Neuromorphic Applications	15
Machine Learning and Algorithms: Let Us Team Up for EDA	15
BHT-NoC: Blaming Hardware Trojans in NoC Routers	14
HPC-Based Malware Detectors Actually Work: Transition to Practice After a Decade of Research	14
Report on the 2021 Embedded Systems Week (ESWEEK)	13
On the Implementation of Fixed-Point Exponential Function for Machine Learning and Signal- Processing Accelerators	13
RosettaStone: Connecting the Past, Present, and Future of Physical Design Research	12
On Backside Probing Techniques and Their Emerging Security Threats	12
STLs for GPUs: Using High-Level Language Approaches	12

Open-Source Multilevel Converter Power IC Design and Test	11
40th IEEE VLSI Test Symposium 2022	11
An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm	11
A Survey of High-Level Synthesis-Based Hardware (IP) Watermarking Approaches	11
Product Health Insights Using Telemetry	11
A NoC-Based Spatial DNN Inference Accelerator With Memory-Friendly Dataflow	11
Special Issue on Testability and Dependability of Artificial Intelligence Hardware	11
A Reinforcement Learning Framework With Region-Awareness and Shared Path Experience for Efficient Routing in Networks-on-Chip	10
Special Issue on Postquantum Cryptography for Internet of Things	10
Side Channel and Fault Analyses on Memristor-Based Logic In-Memory	9
PiN: Processing in Network-on-Chip	9
Losing My Memory	9
Fast Analysis Using Finite Queuing Model for Multilayer NoCs	9
Background Receiver IQ Imbalance Correction for In-Field Testing	8
Exact Stochastic Computing Multiplication in Memristive Memory	8
Attack of the AI Papers	8
Reconfigurable Pipelined Control Systems	8
Robust and Secure Systems	8
Breaking Silos to Guarantee Control Stability with Communication over Ethernet TSN	8
Fair and Comprehensive Benchmarking of Machine Learning Processing Chips	7
Adaptive Integer Linear Programming Model for Optimal Qubit Permutation	7
TTTC News	7
Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic	7
Topology-Aided Multicorner Timing Predictor for Wide Voltage Design	7
Self-Healing of Redundant FLASH ADCs	7
Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder	6
IEEE Design&Test Publication Information	6
TechRxiv: Share Your Preprint Research with the World!	6
Deep Reinforcement Learning for Optimization at Early Design Stages	6
Front Cover	6
IEEE Women in Engineering	6
Update Your IEEE Profile	6
ISLPED 2021: The 25th Anniversary!	6
Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Codesign	6
Front Cover	6
IC SEM Reverse Engineering Tutorial using Artificial Intelligence	5
Front Cover	5
TechRxiv: Share Your Preprint Research With the World!	5
IEEE Foundation	5
IEEE Design & Test Publication Information	5
IEEE Design & Test Publication Information	5
Toward Standardized Vulnerability Assessment of Advanced Packaging Against Probing Attacks	5
Join IEEE	5
SPOCK: Reverse Packet Traversal for Deadlock Recovery	5
IEEE Foundation	5
Binary Forward-Only Algorithms	5
Furthering Moore’s Law Integration Benefits in the Chiplet Era	5
Table of Contents	5
Front Cover	4
Design of Single-Bit Fault-Tolerant Reversible Circuits	4

IEEE Design&Test EIC Call for Nominations	4
[Front cover]	4
IEEE Design&Test publication information	4
Being Learned	4
Front Cover	4
Shape Engineering for Custom Nanomagnetic Logic Circuits in NMLSim 2.0	4
A Mixture of Experts Approach for Low-Cost DNN Customization	4
Proceedings of the IEEE	4
Ladder Scaling Fracmemristor: A Second Emerging Circuit Structure of Fractional-Order Memristor	4
IEEE Foundation	4
Toward Agile Hardware Designs With Chisel: A Network Use Case	4
The AXIOM Project: IoT on Heterogeneous Embedded Platforms	4
Guest Editors’ Introduction: Machine Intelligence at the Edge	4
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions	4
Detecting and Scoring Equipment Faults in Real Time During Semiconductor Test Processes	4
IEEE Design&Test publication information	4
Front Cover	4
Get in the Conversation!	3
IEEE Design & Test Publication Information	3
Front Cover	3
Front Cover	3
IEEE Membership	3
Turbo-FHE: Accelerating Fully Homomorphic Encryption with FPGA and HBM Integration	3
IEEE.tv	3
Front Cover	3
Table of Contents	3
May CEDA Currents	3
Table of Contents	3
Front Cover	3
Report on First and Second ACM/IEEE Workshop on Machine Learning for CAD (MLCAD)	2
Tipping the Balance: Imbalanced Classes in Deep-Learning Side-Channel Analysis	2
Open-Source Electronic Design Automation (EDA) Tools	2
Improvement of Functional Safety of the Level-Crossing Barrier Machine by a Noninvasive Angle-Detection Method	2
Testing Embedded Toggle Generation Through On-Chip IR-Drop Measurements	2
Creating a Foundation for Next-Generation Autonomous Systems	2
DRAM PUFs in Commodity Devices	2
Spectre Returns! Speculation Attacks Using the Return Stack Buffer	2
The 2021 Asia and South Pacific Design Automation Conference (ASPDAC)	2
End-to-End Automated Exploit Generation for Processor Security Validation	2
Recap of the 39th Edition of the International Conference on Computer-Aided Design (ICCAD 2020)	2
Report on the 2023 Embedded Systems Week (ESWEEK)	2
A BIST Approach to Approximate Co-Testing of Embedded Data Converters	2
ISLPED 2023: International Symposium on Low-Power Electronics and Design	2
The 41st IEEE VLSI Test Symposium	2
A Conceptual Framework for Stochastic Neuromorphic Computing	2
Multiplication Circuit Architecture for Error- Tolerant CNN-Based Keywords Speech Recognition	2
A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators, and Security	2
Estimating Code Vulnerability to Timing Errors Via Microarchitecture-Aware Machine Learning	2
Mitigating Speculative Execution Attacks via Context-Sensitive Fencing	2
An Open-Source EDA Flow for Asynchronous Logic	2
Guest Editors’ Introduction: Special Issue on Top Picks in Hardware and Embedded Security	2
Recap of the 61st ACM/IEEE Design Automation Conference (DAC61): The “Chips to Systems Conference”	2
Safety Ethics for Design and Test of Automated Driving Features	2
Special Issue on Ethics in Computing	2
Secure FFT IP Using C-Way Partitioning-Based Obfuscation and Fingerprint	2
Exploring Resilience of LPDRAM Against RowHammer	2
Bandpass NGD Time- Domain Experimental Test of Double-Li Microstrip Circuit	2
Special Issue on Design and Test of Multidie Packages	2
Design for Test With Unreliable Memories by Restoring the Beauty of Randomness	2
Design and Test of Innovative Three-Couplers-Based Bandpass Negative Group Delay Active Circuit	2
25 Years (and a Bit More) of The Last Byte	2
Automated Probe-Mark Analysis for Advanced Probe Technology Characterization	2
Training Binarized Neural Networks Using Ternary Multipliers	2
Open-Source Silicon—Unleashing Innovation and Collaboration	2
The 28th IEEE European Test Symposium	2
Machine Learning for CAD/EDA	1
Autonomous Systems, Trust, and Guarantees	1
Get in the Conversation!	1
IEEE Connects You to a Universe of Information!	1
Machine Intelligence at the Edge	1
Report on the Design Automation Conference (DAC 2021)	1
Recap of the 29th Edition of the Asia and South Pacific Design Automation Conference (ASPDAC 2024)	1
Novel Technique for Manufacturing, System-Level, and In-System Testing of Large SoC Using Functional Protocol-Based High-Speed I/O	1
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	1
On the Impact of Uncertainties in Silicon-Photonic Neural Networks	1
Report on the 28th Asia and South Pacific Design Automation Conference	1
IEEE Connects You to a Universe of Information!	1
Active and Passive Physical Attacks on Neural Network Accelerators	1
Table of Contents	1
The Future of Design for Test and Silicon Lifecycle Management	1

IEEE Design & Test Publication Information	1
Guest Editors’ Introduction: SBCCI 2020	1
Defeating Cache Timing Channels with Hardware Prefetchers	1
Split-Chip Design to Prevent IP Reverse Engineering	1
TechRxiv: Share Your Preprint Research With the World!	1
Table of Contents	1
Table of Contents	1
IEEE Design & Test Publication Information	1
IEEE Design&Test publication information	1
Using STLs for Effective In-Field Test of GPUs	1
Full Key Extraction of SNOW-V Using ML-Assisted Power SCA	1
An Open-Source 12-bit 10-kS/s Incremental ADC in 130-nm CMOS	1
Leveraging Generative AI for Rapid Design and Verification of a Vector Processor SoC	1
A Global Self-Repair Method for TSV Arrays With Adaptive FNS-CAC Codec	1
An Inside Job: Remote Power Analysis Attacks on FPGAs	1
Fully Microstrip Three-Port Circuit Bandpass NGD Design and Test	1
CAFEEN: A Cooperative Approach for Energy-Efficient NoCs With Multiagent Reinforcement Learning	1
Challenges in Assessing and Improving Deep Neural Networks Reliability	1
Randomized Testing of RISC-V CPUs Using Direct Instruction Injection	1
OpenTimer v2: A Parallel Incremental Timing Analysis Engine	1
Hardware Virtualization and Task Allocation for Plug-and-Play Automotive Systems	1
Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives	1
Front Cover	1
TechRxiv: Share Your Preprint Research With the World!	1
IEEE Design & Test Publication Information	1
Expanding Column Line Code Adaptive (CLC-A) for Protecting 32-and 64-Bit Data	1
Understanding Error Propagation in Deep-Learning Neural Networks Accelerators and Applications	1
Statistical Methods for Detecting Recycled Electronics: From ICs to PCBs and Beyond	1
IEEE Foundation	1
IEEE Membership	1
ISCA: Intelligent Sense-Compute Adaptive Co-Optimization of Multimodal Machine Learning Kernels for Resilient mHealth Services on Wearables	1
ISLPED 2022: An Experience of a Hybrid Conference in the Time of COVID-19	1
Adaptive Approximate Computing with CGRAgen	1
Functional Verification of a RISC-V Vector Accelerator	1
Deadlock-Freedom in Computational Neuroscience Simulators	1
IEEE Membership	1
Table of Contents	0
On the Relation Between Reliability and Entropy in Physical Unclonable Functions	0
Table of Contents	0
The 2023 Networks-on-Chip (NOCS) Symposium	0
Remembering Arvind	0
Fault-Tolerant Neuromorphic Computing With Memristors Using Functional ATPG for Efficient Recalibration	0
IEEE App	0
ERIN: Energy-Aware Resource-Provisioning Framework for CPU-FPGA Multitenant Environment	0
Stochastic Computing for Neuromorphic Applications	0
Enabling High-Level Design Strategies for High-Throughput and Low-Power NB-LDPC Decoders	0
Efficient SoC Security Monitoring: Quality Attributes and Potential Solutions	0
A Many-Ported and Shared Memory Architecture for High-Performance ADAS SoCs	0
The 2022 Symposium on Integrated Circuits and Systems Design (SBCCI 2022)	0
Postquantum Cryptography for Internet of Things	0
A DVFS Design and Simulation Framework Using Machine Learning Models	0
Silicon Lifecycle Management	0
IEEE Design&Test Publication Information	0
Still Making Noise: Improving Deep- Learning-Based Side- Channel Analysis	0
Front Cover	0
Special Issue on 2021 Top Picks in Hardware and Embedded Security	0
TechRxiv: Share Your Preprint Research With the World!	0
Workload-Aware Periodic Interconnect BIST	0
Applying IEEE Test Standards to Multidie Designs	0
Guest Editors’ Introduction: Special Issue on Benchmarking Machine Learning Systems and Applications	0
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	0
A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms	0
Getting to Know All About Us	0
Memory Usage Estimation for Dataflow-Model-Based Software Development Methodology	0
In-Stream Correlation-Based Division and Bit-Inserting Square Root in Stochastic Computing	0
Building an Open-Source DNA Assembler Device	0
ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training	0
Special Issue on the 2021 Workshop on Top Picks in Hardware and Embedded Security	0
SBCCI 2022	0
True Interactive Testing Based on IJTAG	0
Verification Approaches for Learning-Enabled Autonomous Cyber–Physical Systems	0
BiomedBench: A benchmark suite of TinyML biomedical applications for low-power wearables	0
Reliability of Deep Neural Networks: Impact and Open Issues	0
IEEE App	0
IEEE Membership	0
Automated Optical Accelerator Search: Expediting Green and Ubiquitous DNN-Powered Intelligence	0
PyH2: Using PyMTL3 to Create Productive and Open-Source Hardware Testing Methodologies	0
Low-Cost Structural Monitoring of Analog Circuits for Secure and Reliable Operation	0
Indirect Test Pattern Generation for Mixed-Signal Circuits Using Machine Learning	0
A Deep Transfer Learning Design Rule Checker With Synthetic Training	0
Get in the Conversation!	0
Power-Saving 8K Real-Time AV1 Arithmetic Encoder Architecture	0
Get in the Conversation!	0
Special Issue on NOCS 2022	0
Is There an Answer?	0
Ethics in Sustainability	0
Special Issue on Silicon Lifecycle Management	0
Integrating Machine-Learning Probes in FPGA CAD: Why and How?	0
Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs	0
A Cautionary Tale About Detecting Malware Using Hardware Performance Counters and Machine Learning	0
CLEAR Cross-Layer Resilience: A Retrospective	0
Lifelong Exploratory Navigation: An Architecture for Safer Mobile Robots	0
Interview With Vishwani Agrawal	0
Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators	0
IEEE Membership	0