IEEE Design & Test

Article	Citations
Join IEEE	52
ISLPED 2021: The 25th Anniversary!	50
BHT-NoC: Blaming Hardware Trojans in NoC Routers	43
Top Picks in Hardware and Embedded Security 2022	33
SPOCK: Reverse Packet Traversal for Deadlock Recovery	31
IEEE Foundation	30
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions	30
On Backside Probing Techniques and Their Emerging Security Threats	28
Special Issue on the 2023 Symposium on Integrated Circuits and Systems Design	21
An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm	19
Being Learned	18
Guest Editors’ Introduction: Machine Intelligence at the Edge	18
Proceedings of the IEEE	17
IEEE.tv	17
IEEE Connects You to a Universe of Information!	16
An Open-Source 12-bit 10-kS/s Incremental ADC in 130-nm CMOS	15
Front Cover	15
ISCA: Intelligent Sense-Compute Adaptive Co-Optimization of Multimodal Machine Learning Kernels for Resilient mHealth Services on Wearables	14
On the Impact of Uncertainties in Silicon-Photonic Neural Networks	14
Tipping the Balance: Imbalanced Classes in Deep-Learning Side-Channel Analysis	14
Improvement of Functional Safety of the Level-Crossing Barrier Machine by a Noninvasive Angle-Detection Method	14
Report on the 28th Asia and South Pacific Design Automation Conference	14
edAttack: Hardware Trojan Attack on On-Chip Packet Compression	13
The 2022 International Conference on Computer-Aided Design (ICCAD)	13
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	13

Statistical Methods for Detecting Recycled Electronics: From ICs to PCBs and Beyond	13
IC Phone Home!	13
FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic	12
Soft and Hard Error-Correction Techniques in STT-MRAM	10
IEEE Design&Test Publication Information	10
IEEE.tv	10
Datapath Extension of NPUs to Support Nonconvolutional Layers Efficiently	9
IEEE Design & Test Publication Information	9
The Memory Shuffle	9
Table of Contents	9
Energy-Efficient and Error-Resilient Cognitive I/O for 3-D-Integrated Manycore Microprocessors	9
IEEE Design&Test publication information	8
Hardware/Software Coexploration for Hyperdimensional Computing on Network-on-Chip Architecture	8
Blank Page	8
IEEE Women in Engineering	8
Get in the Conversation!	8
TTTC News	7
Table of Contents	7
Stochastic Computing for Neuromorphic Applications	7
IEEE Design & Test Publication Information	7
Fault-Tolerant Neuromorphic Computing With Memristors Using Functional ATPG for Efficient Recalibration	7
Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures	7
Remembering Arvind	6
FPGA-Chain: Enabling Holistic Protection of FPGA Supply Chain With Blockchain Technology	6
CaSA: End-to-End Quantitative Security Analysis of Randomly Mapped Caches	6
Special Issue on the 2021 Workshop on Top Picks in Hardware and Embedded Security	6
Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators	6
A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms	6
Table of Contents	6
On the Relation Between Reliability and Entropy in Physical Unclonable Functions	6
CLEAR Cross-Layer Resilience: A Retrospective	6
BiomedBench: A benchmark suite of TinyML biomedical applications for low-power wearables	6
Verification Approaches for Learning-Enabled Autonomous Cyber–Physical Systems	6
IEEE Design & Test Publication Information	5
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems	5
IEEE Membership	5
Get in the Conversation!	5
Voltage–Resistance-Adaptive MPPT Circuit for Energy Harvesting	5
Design and Test of Digital Logic DNA Systems	5
Traversal Packets: Opportunistic Bypass Packets for Deadlock Recovery	5
Embracing Stochasticity to Enable Neuromorphic Computing at the Edge	5
IEEE Membership	5
Table of Contents	5
Power-Quality Configurable Hardware Design for AV1 Directional Intraframe Prediction	5
Dynamically Reconfigurable Network Protocol for Shape-Changeable Computer System	5
Accuracy-Configurable 2-D Gaussian Filter Architecture for Energy-Efficient Image Processing	5
Attack of the AI Papers	5
Table of Contents	4
Robust and Secure Systems	4
Estimating Code Vulnerability to Timing Errors Via Microarchitecture-Aware Machine Learning	4

Design for Test With Unreliable Memories by Restoring the Beauty of Randomness	4
Front Cover	4
Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic	4
IEEE Design & Test Publication Information	4
Binary Forward-Only Algorithms	4
Recap of the 61st ACM/IEEE Design Automation Conference (DAC61): The “Chips to Systems Conference”	4
A Global Self-Repair Method for TSV Arrays With Adaptive FNS-CAC Codec	4
IEEE Foundation	4
Front Cover	4
Table of Contents	4
Guest Editors’ Introduction: SBCCI 2020	4
Special Issue on Design and Test of Multidie Packages	4
Table of Contents	3
The Future of Design for Test and Silicon Lifecycle Management	3
Using STLs for Effective In-Field Test of GPUs	3
Novel Technique for Manufacturing, System-Level, and In-System Testing of Large SoC Using Functional Protocol-Based High-Speed I/O	3
The 28th IEEE European Test Symposium	3
Edge AI -An Industry View	3
Long-Wire Leakage: The Threat of Crosstalk	3
Table of Contents	3
IEEE Connects You to a Universe of Information!	3
ISLPED 2023: International Symposium on Low-Power Electronics and Design	3
A BIST Approach to Approximate Co-Testing of Embedded Data Converters	3
SeMAP—A Method to Secure the Communication in NoC-Based Many-Cores	3
Seamless Thermal Optimization of Parallel Workloads	3
Table of Contents	3
Functional Verification of a RISC-V Vector Accelerator	3
CAFEEN: A Cooperative Approach for Energy-Efficient NoCs With Multiagent Reinforcement Learning	3
IEEE Membership	3
TTTC News	3
IEEE Design & Test Publication Information	3
Framework for Load Power Consumption in HANs Using Machine Learning and IoT Assistance	2
Special Issue on Wearable IoT Devices for Reliable Mobile Health Applications	2
Postquantum Cryptography for Internet of Things	2
Special Issue on NOCS 2022	2
Leveraging RISC-V for HW/SW Co-Design of Flexible and Efficient TinyML SoCs	2
Table of Contents	2
Virtualizing USB Kernel Mode Debug (KMD) Class to Guest OS for Native OS-Like Debug Experience	2
Ethical Design of Computers: From Semiconductors to IoT and Artificial Intelligence	2
Heuristic-Based Algorithms for Low-Complexity AV1 Intraprediction	2
Special Issue on Top Picks in Test and Reliability	2
Front Cover	2
Shaping Resilient AI Hardware Through DNN Computational Feature Exploitation	2
Guest Editors’ Introduction: SBCCI 2023	2
IEEE App	2
IEEE Membership	2
A Case for PIM Support in General-Purpose Compilers	2
SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs	2
Cloud-Ready Acceleration of Formal Method Techniques for Cyber–Physical Systems	2
SAFER: Safety Assurances for Emergent Behavior	2
IEEE Design&Test Is Going Paperless in 2022!	2
Testing for Electromigration in Sub-5-nm FinFET Memories	2
IEEE Design & Test Publication Information	2
GlucoseHD: Predicting Glucose Levels Using Hyperdimensional Computing	2
Rethinking System-on-Chip Verification for Secure Cross-layer Interactions	2
Building an Open-Source DNA Assembler Device	2
This Stuff Is Great—Am I Right?	2
Is There an Answer?	2
Real-Time Requirements for ADAS Platforms Featuring Shared Memory Hierarchies	2
SBCCI 2022	2
Silicon Lifecycle Management (SLM): Requirements, Trends, and Opportunities	2
Majority-Logic-Based Self-Checking Adder in Quantum-Dot Cellular Automata	2
Learning Your Lock: Exploiting Structural Vulnerabilities in Logic Locking	2
Strange Loops in Design and Technology: 59th DAC Keynote Speech	2
Recap of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED’24)	2
Special Issue on the 2023 International Symposium on Networks-on-Chip (NOCS 2023)	2
Spectre Returns! Speculation Attacks Using the Return Stack Buffer	1
Report on the 2021 Embedded Systems Week (ESWEEK)	1
IEEE App	1
IEEE Design & Test Publication Information	1
Bandpass NGD Time- Domain Experimental Test of Double-Li Microstrip Circuit	1
40th IEEE VLSI Test Symposium 2022	1
Deadlock-Freedom in Computational Neuroscience Simulators	1
Special Issue on the First IEEE Top Picks in VLSI Test and Reliability Workshop	1
Machine Learning in Advanced IC Design: A Methodological Survey	1
IEEE Design&Test Is Going Paperless in 2022!	1
VioNet: A Hierarchical Detailed Routing Wire-Short Violation Predictor Based on a Convolutional Neural Network	1
Fair and Comprehensive Benchmarking of Machine Learning Processing Chips	1
Table of Contents	1
Machine Intelligence at the Edge	1

Reverse-Engineering CNN Models Using Side-Channel Attacks	1
Guest Editors’ Introduction: Stochastic Computing for Neuromorphic Applications	1
Analytical Model for Performance Evaluation of Token-Passing-Based WiNoCs	1
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators	1
Background Receiver IQ Imbalance Correction for In-Field Testing	1
Machine Learning for CAD/EDA	1
Table of Contents	1
Automated Probe-Mark Analysis for Advanced Probe Technology Characterization	1
Report on the 2024 Embedded Systems Week (ESWEEK)	1
ISLPED 2022: An Experience of a Hybrid Conference in the Time of COVID-19	1
A Coding Efficiency-Aware Hardware Design for VVC Affine Motion Estimation Reconstructor	1
An EMG Denoising Method Based on Flexible Wearable Sensors	1
TTTC News	1
Front Cover	1
Furthering Moore’s Law Integration Benefits in the Chiplet Era	1
Detecting and Scoring Equipment Faults in Real Time During Semiconductor Test Processes	1
Special Issue on Benchmarking Machine Learning Systems and Applications	1
Cross-Layer Design of Automotive Systems	1
The VCR Effect in Active-RC Continuous-Time Sigma-Delta Modulators	1
TTTC News	1
The 41st IEEE VLSI Test Symposium	1
Front Cover	1
Training Binarized Neural Networks Using Ternary Multipliers	1
Product Health Insights Using Telemetry	1
Fully Microstrip Three-Port Circuit Bandpass NGD Design and Test	1
Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators	1
25 Years (and a Bit More) of The Last Byte	1
Site-to-Site Variation in Analog Multisite Testing: A Survey on Its Detection and Correction	1
Special Issue on Near-Memory and In-Memory Processing	1
IEEE Design & Test Publication Information	1
Get in the Conversation!	1
IEEE Design & Test Publication Information	1
Guest Editors’ Introduction: Special Issue on Autonomous Systems Design	1
Breaking Silos to Guarantee Control Stability with Communication over Ethernet TSN	1
Autonomous Systems, Trust, and Guarantees	1
Testing for Multiple Faults in Deep Neural Networks	0
IEEE Design & Test Publication Information	0
Hard-Sign: A Hardware Watermarking Scheme Using Dated Handwritten Signature	0
Lifelong Exploratory Navigation: An Architecture for Safer Mobile Robots	0
Front Cover	0
Mitigating Speculative Execution Attacks via Context-Sensitive Fencing	0
Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder	0
API-Based Hardware Fault Simulation for DNN Accelerators	0
On the Implementation of Fixed-Point Exponential Function for Machine Learning and Signal- Processing Accelerators	0
Small Is Good	0
ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training	0
Table of Contents	0
IEEE Design & Test Publication Information	0
Using Approximate Circuits Against Hardware Trojans	0
Interview With Yao-Wen Chang	0
EM Side Channels in Hardware Security: Attacks and Defenses	0
Recap of the 29th Edition of the Asia and South Pacific Design Automation Conference (ASPDAC 2024)	0
In-Stream Correlation-Based Division and Bit-Inserting Square Root in Stochastic Computing	0
Special Issue on 2021 Top Picks in Hardware and Embedded Security	0
Holding Conferences Online in Pandemic Times: The DATE Experience	0
IEEE Design & Test Publication Information	0
Design Challenges of Intrachiplet and Interchiplet Interconnection	0
Remote Power Side- Channel Attacks on FPGAs	0
Migortho: A Design Automation Flow for QCA Circuits	0
Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives	0
IEEE Women in Engineering	0
Split-Chip Design to Prevent IP Reverse Engineering	0
Secure Interposer-Based Heterogeneous Integration	0
Interview With Janet Olson	0
IEEE Design&Test publication information	0
Affordable and Comprehensive Testing of 3-D Stacked Die Devices	0
Workload-Aware Periodic Interconnect BIST	0
Table of Contents	0
Report on the Design Automation Conference (DAC 2021)	0
IEEE Women in Engineering	0
SIT: Stochastic Input Transformation to Defend Against Adversarial Attacks on Deep Neural Networks	0
Indirect Test Pattern Generation for Mixed-Signal Circuits Using Machine Learning	0
A 703.4-GOPs/W Binary SegNet Processor With Computing-Near-Memory Architecture for Road Detection	0
Self-Sustainable Wearable and Internet of Things (IoT) Devices for Health Monitoring: Opportunities and Challenges	0
IEEE Membership	0
FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs)	0
Fuzzing for Automated SoC Security Verification: Challenges and Solution	0
Table of Contents	0
A Hardware Accelerator for Language-Guided Reinforcement Learning	0
PiN: Processing in Network-on-Chip	0
ViT-Reg: Regression-Focused Hardware-Aware Fine-Tuning for ViT on tinyML Platforms	0
Front Cover	0
Graph-Based Circuit Simulator for Switched Capacitor Circuits	0
TTTC News	0
STAR: A Mixed Analog Stochastic In-DRAM Convolutional Neural Network Accelerator	0
Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs	0
IEEE Foundation	0
IEEE Design & Test Publication Information	0
IEEE Design & Test Publication Information	0
Front Cover	0
Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow	0
Front Cover	0
Memory Usage Estimation for Dataflow-Model-Based Software Development Methodology	0
Lynn Conway: Two Remembrances	0
Cross-Layer Design of Cyber–Physical Systems	0